Renesas 4514 Manual de usuario

Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp.The semiconductor o

4513/4514 Group User’s ManualvList of figuresFig. 42 Ceramic resonator external circuit ...

4513/4514 Group User’s ManualHARDWARE1-87K03K02K01K00Key-on wakeup control register K0PU03PU02PU01PU00Key-on wakeup not usedKey-on wakeup usedKey-on w

1-88HARDWARE4513/4514 Group User’s ManualTable 25 Product of built-in PROM versionProductM34513E4SP/FPM34513E8FPM34514E8FPROM typeOne Time PROM versio

4513/4514 Group User’s ManualHARDWARE1-89Fig. 52 Flow of writing and test of the product shipped in blankFig. 51 PROM memory map(1) PROM modeThe built

1-90HARDWARE4513/4514 Group User’s ManualBUILT-IN PROM VERSION

CHAPTER 2CHAPTER 2APPLICATION2.1 I/O pins2.2 Interrupts2.3 Timers2.4 Serial I/O2.5 A-D converter2.6 Voltage comparator2.7 Reset2.8 Voltage drop detec

2-2APPLICATION2.1 I/O pins4513/4514 Group User’s Manual2.1 I/O pinsThe 4513/4514 Group has the twenty-eight I/O pins (eighteen I/O pins for 4513 Group

4513/4514 Group User’s ManualAPPLICATION2-32.1 I/O pins(4) Port P3Port P3 is a 4-bit I/O port for the 4514 Group, and a 2-bit I/O port for the 4513 Gr

2-4APPLICATION2.1 I/O pins4513/4514 Group User’s Manual(7) Port DD0–D7 are eight independent I/O ports. Input/output of port DEach pin of port D has

4513/4514 Group User’s ManualAPPLICATION2-52.1 I/O pins(2) Key-on wakeup control register K0Register K0 controls the ON/OFF of the key-on wakeup funct

2-6APPLICATION2.1 I/O pins4513/4514 Group User’s Manual(4) Direction register FR0 (The 4513 Group does not have this register.)Register FR0 is used to

vi4513/4514 Group User’s ManualCHAPTER 3 APPENDIXFig. 3.2.1 A-D conversion characteristics data ...

4513/4514 Group User’s ManualAPPLICATION2-72.1 I/O pins2.1.3 Port application examples(1) Key input by key scanKey matrix can be set up by connecting

2-8APPLICATION2.1 I/O pins4513/4514 Group User’s ManualFig. 2.1.2 Key scan input timingD0D1D2D3IAP0 IAP0 IAP0 IAP0 IAP0“H”“L”“H”“L”“H”“L”“H”“L”Input t

4513/4514 Group User’s ManualAPPLICATION2-92.1 I/O pins2.1.4 Notes on use(1) Note when an I/O port except port P5 is used as an input portSet the outp

2-10APPLICATION2.1 I/O pins4513/4514 Group User’s ManualTable 2.1.6 connections of unused pinsPinXOUTVDCED0–D5D6/CNTR0D7/CNTR1P20/SCKP21/SOUTP22/SINP3

APPLICATION2.2 Interrupts2-114513/4514 Group User’s Manual2.2 InterruptsThe 4513/4514 Group has eight interrupt sources : external (INT0, INT1), timer

APPLICATION2.2 Interrupts2-124513/4514 Group User’s Manual(4) Timer 2 interruptThe interrupt request occurs by the timer 2 underflow. Timer 2 interru

APPLICATION2.2 Interrupts2-134513/4514 Group User’s Manual(7) A-D interruptThe interrupt request occurs by the end of the A-D conversion. A-D interru

APPLICATION2.2 Interrupts2-144513/4514 Group User’s Manual(2) Interrupt control register V1Interrupt enable bits of external 0, external 1, timer 1 an

APPLICATION2.2 Interrupts2-154513/4514 Group User’s ManualInterrupt control register I1 at reset : 00002 at RAM back-up : state retainedR/WThis bit ha

APPLICATION2.2 Interrupts2-164513/4514 Group User’s Manual2.2.3 Interrupt application examples(1) External 0 interruptThe INT0 pin is used for externa

4513/4514 Group User’s ManualviiList of tablesCHAPTER 1 HARDWARETable Selection of system clock ...

APPLICATION2.2 Interrupts2-174513/4514 Group User’s Manual(6) Timer 4 interruptConstant period interrupts by a setting value to timer 4 can be used.Ou

APPLICATION2.2 Interrupts2-184513/4514 Group User’s ManualFig. 2.2.2 INT0 interrupt setting exampleNote: The valid waveforms causing the interrupt mus

APPLICATION2.2 Interrupts2-194513/4514 Group User’s ManualFig. 2.2.3 INT1 interrupt operation exampleP31/INT1P31/INT1“H”“H”“L”“L”An interrupt occurs a

APPLICATION2.2 Interrupts2-204513/4514 Group User’s ManualFig. 2.2.4 INT1 interrupt setting exampleNote: The valid waveforms causing the interrupt mus

APPLICATION2.2 Interrupts2-214513/4514 Group User’s ManualFig. 2.2.5 Timer 1 constant period interrupt setting exampleb3 b001b3 b01g0 hb3 b011100b3 b0

APPLICATION2.2 Interrupts2-224513/4514 Group User’s ManualFig. 2.2.6 Timer 2 constant period interrupt setting example0b3 b0➀ Disable InterruptsTimer

APPLICATION2.2 Interrupts2-234513/4514 Group User’s ManualFig. 2.2.7 Timer 3 constant period interrupt setting exampleg0 h0b3 b0➀ Disable InterruptsTi

APPLICATION2.2 Interrupts2-244513/4514 Group User’s ManualFig. 2.2.8 Timer 4 constant period interrupt setting example0b3 b0➀ Disable InterruptsTimer

APPLICATION2.2 Interrupts2-254513/4514 Group User’s Manual2.2.4 Notes on use(1) Setting of INT0 interrupt valid waveformDepending on the input state o

APPLICATION2.3 Timers2-264513/4514 Group User’s Manual2.3 TimersThe 4513/4514 Group has four 8-bit timers (each has a reload register) and a 16-bit fi

viii4513/4514 Group User’s ManualList of tablesTable 2.5.1 A-D control register Q1 ...

APPLICATION2.3 Timers2-274513/4514 Group User’s Manual2.3.2 Related registers(1) Interrupt control register V1The timer 1 interrupt enable bit is assi

APPLICATION2.3 Timers2-284513/4514 Group User’s Manual(3) Timer control register W1The timer 1 count start synchronous circuit control bit is assigned

APPLICATION2.3 Timers2-294513/4514 Group User’s Manual(5) Timer control register W3The timer 3 count source selection bits are assigned to bits 0 and

APPLICATION2.3 Timers2-304513/4514 Group User’s Manual2.3.3 Timer application examples(1) Timer operation: measurement of constant periodThe constant

APPLICATION2.3 Timers2-314513/4514 Group User’s Manual(4) CNTR1 output control: square wave output controlOutline: The output/stop of square wave from

APPLICATION2.3 Timers2-324513/4514 Group User’s ManualFig. 2.3.3 Constant period measurement setting exampleg0 h0b3 b0➀ Disable InterruptsTimer 1 inte

APPLICATION2.3 Timers2-334513/4514 Group User’s ManualFig. 2.3.4 CNTR0 output setting exampleg0 h0b3 b0➀ Disable InterruptsTimer 1 interrupt is tempor

APPLICATION2.3 Timers2-344513/4514 Group User’s Manual0b3 b0➀ Disable InterruptsTimer 2 interrupt is temporarily disabled.Interrupt enable flag INTEIn

APPLICATION2.3 Timers2-354513/4514 Group User’s ManualFig. 2.3.6 CNTR0 output control setting exampleb3 b0➀ Disable InterruptsTimer 3 and timer 4 inte

APPLICATION2.3 Timers2-364513/4514 Group User’s ManualFig. 2.3.7 Timer start by external input setting example (1)0b3 b0➀ Disable InterruptsTimer 1 in

CHAPTER 1CHAPTER 1HARDWAREDESCRIPTIONFEATURESAPPLICATIONPIN CONFIGURATIONBLOCK DIAGRAMPERFORMANCE OVERVIEWPIN DESCRIPTIONFUNCTION BLOCK OPERATIONSROM

APPLICATION2.3 Timers2-374513/4514 Group User’s ManualFig. 2.3.8 Timer start by external input setting example (2)(TI1A instruction)b3 b0100Processing

APPLICATION2.3 Timers2-384513/4514 Group User’s ManualFig. 2.3.9 Watchdog timer setting exampleg0 h••••••➀ Activate Watchdog TimerWatchdog timer is ac

APPLICATION2.3 Timers2-394513/4514 Group User’s Manual2.3.4 Notes on use(1) PrescalerStop the prescaler operation to change its frequency dividing rat

APPLICATION2.4 Serial I/O2-404513/4514 Group User’s Manual2.4 Serial I/OThe 4513/4514 Group has a clock-synchronous serial I/O which can be used to tr

APPLICATION2.4 Serial I/O2-414513/4514 Group User’s Manual2.4.2 Related registers(1) Serial I/O register SISerial I/O register SI is the 8-bit data tr

APPLICATION2.4 Serial I/O2-424513/4514 Group User’s Manual2.4.3 Operation descriptionFigure 2.4.2 shows the serial I/O connection example, Figure 2.4.

APPLICATION2.4 Serial I/O2-434513/4514 Group User’s ManualFig. 2.4.4 Serial I/O transfer timingSINSOUTSlaveSCKSST instructionSOUTSINS0S7’S1S2S3S4S5S6S

APPLICATION2.4 Serial I/O2-444513/4514 Group User’s ManualThe full duplex communication of master and slave is described using the connection example

APPLICATION2.4 Serial I/O2-454513/4514 Group User’s Manual(2) Transmit/receive operation of slave➀ The transmit data is written into the serial I/O re

APPLICATION2.4 Serial I/O2-464513/4514 Group User’s ManualFig. 2.4.5 Master serial I/O setting exampleg0 hb3 b0➀ Disable InterruptsSerial I/O interrup

1-2HARDWARE4513/4514 Group User’s Manual

APPLICATION2.4 Serial I/O2-474513/4514 Group User’s ManualFig. 2.4.6 Slave serial I/O exampleb3 b0➀ Disable InterruptsSerial I/O interrupt is tempora

APPLICATION2.4 Serial I/O2-484513/4514 Group User’s Manual2.4.5 Notes on use(1) Note when an external clock is used as a synchronous clock:• An extern

APPLICATION2.5 A-D converter2-494513/4514 Group User’s Manual2.5 A-D converterThe 4513/4514 Group has an A-D converter with the 10-bit successive comp

APPLICATION2.5 A-D converter2-504513/4514 Group User’s Manual2.5.1 Related registers(1) A-D control register Q1Analog input pin selection bits are ass

APPLICATION2.5 A-D converter2-514513/4514 Group User’s Manual2.5.2 A-D converter application examples(1) A-D conversion modeOutline: Analog input sign

APPLICATION2.5 A-D converter2-524513/4514 Group User’s Manual2.5.3 Notes on use(1) Note when the A-D conversion starts againWhen the A-D conversion st

APPLICATION2.5 A-D converter2-534513/4514 Group User’s Manual(5) A-D converter is used at the comparator modeThe analog input voltage is higher than t

APPLICATION2.6 Voltage comparator2-544513/4514 Group User’s Manual2.6 Voltage comparatorThe 4513/4514 Group has two voltage comparators; CMP0-, CMP0+,

APPLICATION2.6 Voltage comparator2-554513/4514 Group User’s Manual2.6.3 Notes on use● Voltage comparator functionWhen the voltage comparator function

APPLICATION2-564513/4514 Group User’s Manual2.7 ResetSystem reset is performed by applying “L” level to the RESET pin for 1 machine cycle or more when

4513/4514 Group User’s ManualHARDWARE1-3DESCRIPTIONThe 4513/4514 Group is a 4-bit single-chip microcomputer de-signed with CMOS technology. Its CPU is

APPLICATION2-574513/4514 Group User’s Manual• Program counter (PC) ...

APPLICATION2-584513/4514 Group User’s Manual2.8 Voltage drop detection circuit2.8 Voltage drop detection circuitThe built-in voltage drop detection ci

APPLICATION2-594513/4514 Group User’s Manual2.9 RAM back-up2.9 RAM back-up2.9.1 RAM back-up modeThe system enters RAM back-up mode when the POF instru

APPLICATION2-604513/4514 Group User’s Manual2.9 RAM back-upRemarksSet the port using the key-on wakeup function selectedwith register K0 to “H” level

APPLICATION2-614513/4514 Group User’s Manual2.9 RAM back-up(2) Pull-up control register PU0Pull-up control register PU0 controls the pull-up functions

APPLICATION2-624513/4514 Group User’s Manual2.9 RAM back-up(4) Interrupt control register I2The interrupt valid waveform for INT1 pin/return level sel

APPLICATION2-634513/4514 Group User’s Manual2.10 Oscillation circuit2.10 Oscillation circuitThe 4513/4514 Group has an internal oscillation circuit to

APPLICATION2-644513/4514 Group User’s Manual2.10 Oscillation circuit2.10.2 Oscillation operationSystem clock is supplied to CPU and peripheral device

CHAPTER 3CHAPTER 3APPENDIX3.1 Electrical characteristics3.2 Typical characteristics3.3 List of precautions3.4 Notes on noise3.5 Mask ROM confirmation

APPENDIX3.1 Electrical characteristics3-24513/4514 Group User’s ManualParameterSupply voltageInput voltage P0, P1, P2, P3, P4, P5, RESET,XIN, VDCEInpu

1-4HARDWARE4513/4514 Group User’s ManualPIN CONFIGURATION (TOP VIEW) 4513 GroupM34513Mx-XXXSPM34513E4SP32313029282726252423222120191817123456789101112

4513/4514 Group User’s ManualAPPENDIX3-33.1 Electrical characteristicsSymbolVDDVRAMVSSVIHVIHVIHVIHVILVILVILIOH(peak)IOH(avg)IOL(peak)IOL(peak)IOL(peak

APPENDIX3.1 Electrical characteristics3-44513/4514 Group User’s ManualVDD = 2.5 V to 5.5 VVDD = 2.0 V to 5.5 VVDD = 2.5 V to 5.5 VVDD = 4.0 V to 5.5 V

4513/4514 Group User’s ManualAPPENDIX3-53.1 Electrical characteristics3.1.3 Electrical characteristicsTable 3.1.4 Electrical characteristics(Mask ROM

APPENDIX3.1 Electrical characteristics3-64513/4514 Group User’s Manual3.1.4 A-D converter recommended operating conditionsTable 3.1.5 A-D converter re

4513/4514 Group User’s ManualAPPENDIX3-73.1 Electrical characteristics3.1.7 Basic timing diagram3.1.6 Voltage comparator characteristicsTable 3.1.8 Vo

3-8APPENDIX3.2 Typical characteristics4513/4514 Group User’s Manual00.10.20.30.40.50.60.70.80.911.11.21.31.41.51.61.71.81.922.12.22.32.42.52 2.5 3 3.5

4513/4514 Group User’s ManualAPPENDIX3-93.2 Typical characteristicsSupply voltage VDD (V)Supply current IDD (mA)Supply voltage VDD (V)Supply current I

3-10APPENDIX3.2 Typical characteristics4513/4514 Group User’s Manual00.511.522.533.544.552 2.5 3 3.5 4 4.5 5 5.5Supply voltage VDD (V)Supply current I

4513/4514 Group User’s ManualAPPENDIX3-113.2 Typical characteristics01020304050607080901000 0.5 1 1.5 201020304050607080901000 0.5 1 1.5 23.2.2 VOL–IO

3-12APPENDIX3.2 Typical characteristics4513/4514 Group User’s Manual01020304050607080901000 0.5 1 1.5 201020304050607080901000 0.5 1 1.5 2(3) Pins D0–

4513/4514 Group User’s ManualHARDWARE1-5PIN CONFIGURATION (TOP VIEW) 4514 GroupP12P11P10P03P02P01P00AIN3/CMP1+AIN2/CMP1-AIN1/CMP0+AIN0/CMP0-P31/INT1P3

4513/4514 Group User’s ManualAPPENDIX3-133.2 Typical characteristics0501001502002503003502 2.5 3 3.5 4 4.5 5 5.5 6-100-90-80-70-60-50-40-30-20-1000 0.

3-14APPENDIX3.2 Typical characteristics4513/4514 Group User’s Manual3.2.5 A-D converter typical characteristicsFig. 3.2.1 A-D conversion characteristi

4513/4514 Group User’s ManualAPPENDIX3-153.2 Typical characteristics(1) VDD = 3.072 V, f(XIN) = 2 MHz, high-speed mode-4.5-3-1.501.534.50 16 32 48 64

3-16APPENDIX3.2 Typical characteristics4513/4514 Group User’s Manual(2) VDD = 5.12 V, f(XIN) = 4 MHz, high-speed mode-7.5-5-2.502.557.50 16 32 48 64 8

4513/4514 Group User’s ManualAPPENDIX3-173.2 Typical characteristics-25-20-15-10-505101520250 0.5 1 1.5 2 2.5 3-100-80-60-40-200204060801000 0.5 1 1.5

3-18APPENDIX3.2 Typical characteristics4513/4514 Group User’s Manual-200-160-120-80-40040801201602000 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5-50-40-30-20-100102

4513/4514 Group User’s ManualAPPENDIX3-193.2 Typical characteristics00.511.522.533.544.555.52 2.5 3 3.5 4 4.5 5 5.5 600.511.522.533.544.555.52 2.5 3 3

3-20APPENDIX3.2 Typical characteristics4513/4514 Group User’s Manual00.511.522.533.544.555.52 2.5 3 3.5 4 4.5 5 5.5 6(3) Pins INT0, INT1, CNTR0, CNTR

4513/4514 Group User’s ManualAPPENDIX3-213.3 List of precautions3.3 List of precautions➀Noise and latch-up preventionConnect a capacitor on the follow

3-22APPENDIX3.3 List of precautions4513/4514 Group User’s Manual➉ A-D converter-1When the operating mode of the A-D converter is changed fromthe compa

1-6HARDWARE4513/4514 Group User’s ManualBLOCK DIAGRAM (4513 Group)|[go1Voltage drop detection circuit4Serial I/O(8 bits ✕ 1)Voltage comparator(2 circu

4513/4514 Group User’s ManualAPPENDIX3-233.3 List of precautions16Voltage comparator functionWhen the voltage comparator function is valid with the vo

3-24APPENDIX3.4 Notes on noise4513/4514 Group User’s Manual3.4 Notes on noiseCountermeasures against noise are described below.The following counterme

4513/4514 Group User’s ManualAPPENDIX3-253.4 Notes on noise(3) Wiring for clock input/output pins• Make the length of wiring which is connectedto clo

3-26APPENDIX3.4 Notes on noise4513/4514 Group User’s Manual(5) Wiring to VPP pin of One Time PROM versionIn the built-in PROM version of the 4513/4514

4513/4514 Group User’s ManualAPPENDIX3-273.4 Notes on noise3.4.3 Wiring to analog input pins• Connect an approximately 100 Ω to 1 kΩ resistorto an ana

3-28APPENDIX3.4 Notes on noise4513/4514 Group User’s ManualFig. 3.4.9 Wiring to a signal line where potentiallevels change frequently(3) Oscillator pr

4513/4514 Group User’s ManualAPPENDIX3-293.4 Notes on noise<The main routine>• Assigns a single word of RAM to a softwarewatchdog timer (SWDT) a

3-30APPENDIX4513/4514 Group User’s Manual3.5 Mask ROM order confirmation form3.5 Mask ROM order confirmation form1. ConfirmationSpecify the type o

4513/4514 Group User’s ManualAPPENDIX3-313.5 Mask ROM order confirmation form✽ 1. ConfirmationSpecify the type of EPROMs submitted.Three sets of EPROM

3-32APPENDIX4513/4514 Group User’s Manual3.5 Mask ROM order confirmation form✽ 1. ConfirmationSpecify the type of EPROMs submitted.Three sets of EPROM

MITSUBISHI 4-BIT SINGLE-CHIP MICROCOMPUTER4500 SERIES4513/4514GroupUser’s Manual

4513/4514 Group User’s ManualHARDWARE1-7BLOCK DIAGRAM (4514 Group)Voltage drop detection circuitSerial I/O(8 bits ✕ 1)Voltage comparator(2 circuits)XI

4513/4514 Group User’s ManualAPPENDIX3-333.5 Mask ROM order confirmation form✽ 1. ConfirmationSpecify the type of EPROMs submitted.Three sets of EPROM

3-34APPENDIX4513/4514 Group User’s Manual3.5 Mask ROM order confirmation form✽ 1. ConfirmationSpecify the type of EPROMs submitted.Three sets of EPROM

4513/4514 Group User’s ManualAPPENDIX3-353.5 Mask ROM order confirmation form✽ 1. ConfirmationSpecify the type of EPROMs submitted.Three sets of EPROM

3-36APPENDIX4513/4514 Group User’s Manual3.6 Mark specification form3.6 Mark specification form32P4B (32-PIN SHRINK DIP) MARK SPECIFICATION FORMMitsub

4513/4514 Group User’s ManualAPPENDIX3-373.6 Mark specification form32P6B (32-PIN LQFP) MARK SPECIFICATION FORMMitsubishi IC catalog namePlease choose

3-38APPENDIX4513/4514 Group User’s Manual3.6 Mark specification form42P2R-A (42-PIN SHRINK SOP) MARK SPECIFICATION FORMMitsubishi IC catalog namePleas

4513/4514 Group User’s ManualAPPENDIX3-393.7 Package outline3.7 Package outlineSDIP32-P-400-1.78Weight(g)– 2.2JEDEC CodeEIAJ Package CodeLead Material

3-40APPENDIX4513/4514 Group User’s Manual3.7 Package outlineSSOP42-P-450-0.80Weight(g)–JEDEC Code0.63EIAJ Package CodeLead MaterialAlloy 42/Cu Alloy42

MITSUBISHI SEMICONDUCTORSUSER’S MANUAL4513/4514 GroupDec. First Edition 1998Editioned byCommittee of editing of Mitsubishi Semiconductor USER’S MANUAL

Rev. Rev.No. date1.0 First Edition 981211REVISION DESCRIPTION LIST 4513/4514 GROUP USER'S MANUAL(1/1)Revision Description

1-8HARDWARE4513/4514 Group User’s ManualPERFORMANCE OVERVIEWFunction1231280.75 µs (at 4.0 MHz oscillation frequency, in high-speed mode)2048 words ✕ 1

User’s Manual4513/4514 Group© 1998 MITSUBISHI ELECTRIC CORPORATION.New publication, effective Dec. 1998.Specifications subject to change without notic

4513/4514 Group User’s ManualHARDWARE1-9PIN DESCRIPTIONNamePower supplyGroundVoltage drop detec-tion circuit enableCNVSSReset inputSystem clock inputS

1-10HARDWARE4513/4514 Group User’s ManualNotes 1: Pins except above have just single function.2: The input of D6, D7, P20–P22, CMP0-, CMP0+, CMP1-, CM

4513/4514 Group User’s ManualHARDWARE1-11Notes 1: The 4513 Group does not have P32 and P33.2: The 4513 Group does not have these ports.DEFINITION OF C

1-12HARDWARE4513/4514 Group User’s ManualPORT BLOCK DIAGRAMSPIN DESCRIPTIONDTQAiP00,P01K00PU00DTAiP02,P03K01PU01DTAiP10,P11K02PU02DTAiP12,P13K03PU03Ke

4513/4514 Group User’s ManualHARDWARE1-13PORT BLOCK DIAGRAMS (continued)PIN DESCRIPTIONSynchronous clock input for serial transferRegister AIAP2 instr

1-14HARDWARE4513/4514 Group User’s ManualPORT BLOCK DIAGRAMS (continued)PIN DESCRIPTIONAIN0/CMP0-Q1Q30AIN1/CMP0++-Q32AIN2/CMP1-Q31AIN3/CMP1++-Q33OP4A

4513/4514 Group User’s ManualHARDWARE1-15PORT BLOCK DIAGRAMS (continued)PIN DESCRIPTIONP50–P53DTQOP5A instructionAiRegister AIAP5 instructionD0–D5SD i

1-16HARDWARE4513/4514 Group User’s ManualExternal interrupt circuit structurePIN DESCRIPTION01I2201EXF1I21SNZI1P31/INT101I12WakeupSkip01EXF0I11SNZI0P3

keep safety first in your circuit designs !● Mitsubishi Electric Corporation puts the maximum effort into making semiconductorproducts better and more

4513/4514 Group User’s ManualHARDWARE1-17FUNCTION BLOCK OPERATIONSFUNCTION BLOCK OPERATIONSCPU(1) Arithmetic logic unit (ALU)The arithmetic logic unit

1-18HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONS(5) Stack registers (SKS) and stack pointer (SP)Stack registers (SKs) are used to te

4513/4514 Group User’s ManualHARDWARE1-19FUNCTION BLOCK OPERATIONS(8) Program counter (PC)Program counter (PC) is used to specify a ROM address (page

1-20HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSPROGRAM MEMOY (ROM)The program memory is a mask ROM. 1 word of ROM is composedof 10

4513/4514 Group User’s ManualHARDWARE1-21FUNCTION BLOCK OPERATIONSDATA MEMORY (RAM)1 word of RAM is composed of 4 bits, but 1-bit manipulation (withth

1-22HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSINTERRUPT FUNCTIONThe interrupt type is a vectored interrupt branching to an individ

4513/4514 Group User’s ManualHARDWARE1-23FUNCTION BLOCK OPERATIONS(4) Internal state during an interruptThe internal state of the microcomputer during

1-24HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONS(6) Interrupt control registers• Interrupt control register V1Interrupt enable bits

4513/4514 Group User’s ManualHARDWARE1-25FUNCTION BLOCK OPERATIONS(7) Interrupt sequenceInterrupts only occur when the respective INTE flag, interrupt

1-26HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSTable 7 External interrupt activated conditionsNameExternal 0 interruptExternal 1 in

PrefaceThis user’s manual describes the hardware andinstructions of Mitsubishi’s 4513/4514 Group CMOS4-bit microcomputer.After reading this manual, th

4513/4514 Group User’s ManualHARDWARE1-27FUNCTION BLOCK OPERATIONS(1) External 0 interrupt request flag (EXF0)External 0 interrupt request flag (EXF0)

1-28HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONS(3) External interrupt control registers• Interrupt control register I1Register I1 c

4513/4514 Group User’s ManualHARDWARE1-29FUNCTION BLOCK OPERATIONSTIMERSThe 4513/4514 Group has the programmable timers.• Programmable timerThe progra

1-30HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSCount source• Instruction clock• Prescaler output (ORCLK)• Timer 1 underflow• Presca

4513/4514 Group User’s ManualHARDWARE1-31FUNCTION BLOCK OPERATIONSFig. 19 Timers structureT4FT3F100100W31,W3001W33(Note 3)01W43(Note 3)11T1F(T2AB)T2F(

1-32HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSTable 10 Timer control registers01010101W210011Stop (state initialized)OperatingInst

4513/4514 Group User’s ManualHARDWARE1-33FUNCTION BLOCK OPERATIONS(1) Timer control registers• Timer control register W1Register W1 controls the count

1-34HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONS(6) Timer 3 (interrupt function)Timer 3 is an 8-bit binary down counter with the tim

4513/4514 Group User’s ManualHARDWARE1-35FUNCTION BLOCK OPERATIONSWATCHDOG TIMERWatchdog timer provides a method to reset the system when a pro-gram r

1-36HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSSERIAL I/OThe 4513/4514 Group has a built-in clock synchronous serial I/Owhich can s

This user’s manual consists of the following three chapters. Refer to the chapter appropriate to your conditions,such as hardware design or software d

4513/4514 Group User’s ManualHARDWARE1-37FUNCTION BLOCK OPERATIONSFig. 23 Serial I/O register state when transferring(1) Serial I/O register SISerial

1-38HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONS(5) How to use serial I/OFigure 24 shows the serial I/O connection example. Serial I

4513/4514 Group User’s ManualHARDWARE1-39FUNCTION BLOCK OPERATIONSFig. 25 Timing of serial I/O data transferSINSOUTSCKSOUTSINS0S7’S1S2S3S4S5S6S7S0S7’S

1-40HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSTable 13 Processing sequence of data transfer from master to slave1-byte data is ser

4513/4514 Group User’s ManualHARDWARE1-41FUNCTION BLOCK OPERATIONSA-D CONVERTERThe 4513/4514 Group has a built-in A-D conversion circuit thatperforms

1-42HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSQ13Q12Q11Q10A-D control register Q1Not usedAnalog input pin selection bits (Note 2)a

4513/4514 Group User’s ManualHARDWARE1-43FUNCTION BLOCK OPERATIONSTable 16 Change of successive comparison register AD during A-D conversionComparison

1-44HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSFig. 28 Setting registers0 ✕✕1(Bit 3) (Bit 0)A-D control register Q2AIN4 function se

4513/4514 Group User’s ManualHARDWARE1-45FUNCTION BLOCK OPERATIONS(10) Operation at comparator modeThe A-D converter is set to comparator mode by sett

1-46HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONS(15) Notes for the use of A-D conversion 2Do not change the operating mode (both A-D

4513/4514 Group User’s ManualiTable of contentsCHAPTER 1 HARDWAREDESCRIPTION ...

4513/4514 Group User’s ManualHARDWARE1-47FUNCTION BLOCK OPERATIONSVOLTAGE COMPARATORThe 4513/4514 Group has 2 voltage comparator circuits thatperform

1-48HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONSVoltage comparator control register Q3 (Note 2) at reset : 00002 at RAM back-up : st

4513/4514 Group User’s ManualHARDWARE1-49FUNCTION BLOCK OPERATIONSRESET FUNCTIONSystem reset is performed by applying “L” level to RESET pin for1 mac

1-50HARDWARE4513/4514 Group User’s ManualFUNCTION BLOCK OPERATIONS(1) Power-on resetReset can be performed automatically at power on (power-on re-set)

4513/4514 Group User’s ManualHARDWARE1-51FUNCTION BLOCK OPERATIONS• Program counter (PC) ...

1-52HARDWARE4513/4514 Group User’s ManualVOLTAGE DROP DETECTION CIRCUITThe built-in voltage drop detection circuit is designed to detect adrop in volt

4513/4514 Group User’s ManualHARDWARE1-53RAM BACK-UP MODEThe 4513/4514 Group has the RAM back-up mode.When the EPOF and POF instructions are executed

1-54HARDWARE4513/4514 Group User’s Manual(4) Return signalAn external wakeup signal is used to return from the RAM back-upmode because the oscillation

4513/4514 Group User’s ManualHARDWARE1-55Fig. 38 State transitionFig. 39 Set source and clear source of the P flag Fig. 40 Start condition identified

1-56HARDWARE4513/4514 Group User’s ManualTable 22 Key-on wakeup control register, pull-up control register, and interrupt control registerK03K02K01K00

ii4513/4514 Group User’s ManualCHAPTER 2 APPLICATION2.1 I/O pins ...

4513/4514 Group User’s ManualHARDWARE1-57CLOCK CONTROLThe clock control circuit consists of the following circuits.• System clock generating circuit•

1-58HARDWARE4513/4514 Group User’s ManualClock signal f(XIN) is obtained by externally connecting a ceramicresonator.Connect this external circuit to

4513/4514 Group User’s ManualHARDWARE1-59LIST OF PRECAUTIONS➀Noise and latch-up preventionConnect a capacitor on the following condition to prevent no

1-60HARDWARE4513/4514 Group User’s Manual➉ A-D converter-1When the operating mode of the A-D converter is changed fromthe comparator mode to the A-D c

4513/4514 Group User’s ManualHARDWARE1-6116Voltage comparator functionWhen the voltage comparator function is valid with the voltagecomparator control

1-62HARDWARE4513/4514 Group User’s ManualSYMBOLThe symbols shown below are used in the following instruction function table and instruction list.Symbo

4513/4514 Group User’s ManualHARDWARE1-63LIST OF INSTRUCTION FUNCTIONGroup-ingRAM addressesFunction(Mj(DP)) ← 1j = 0 to 3(Mj(DP)) ← 0j = 0 to 3(Mj(DP)

1-64HARDWARE4513/4514 Group User’s ManualLIST OF INSTRUCTION FUNCTION (continued)Function(T1F) = 1 ?After skipping(T1F) ← 0(T2F) = 1 ?After skipping(T

4513/4514 Group User’s ManualHARDWARE1-65LIST OF INSTRUCTION FUNCTION (continued)MnemonicTK0ATAK0TPU0ATAPU0TFR0A*TABSITSIABTAJ1TJ1ASSTSNZSIFunction(K0

1-66HARDWARE4513/4514 Group User’s ManualINSTRUCTION CODE TABLE (for 4513 Group)D3–D0Hex.notation00000001001000110100010101100111100010011010101111001

4513/4514 Group User’s ManualiiiCHAPTER 3 APPENDIX3.1 Electrical characteristics ...

4513/4514 Group User’s ManualHARDWARE1-67INSTRUCTION CODE TABLE (continued) (for 4513 Group)––TJ1A–TQ1ATQ2ATQ3A–––––––TW1ATW2ATW3ATW4A–TW6A––TMRATI1AT

1-68HARDWARE4513/4514 Group User’s ManualINSTRUCTION CODE TABLE (for 4514 Group)NOP–POFSNZPDIEIRCSC––AMAMCTYA–TBA–BLACLD–INYRDSD–DEYANDORTEAB–CMARARTA

4513/4514 Group User’s ManualHARDWARE1-69INSTRUCTION CODE TABLE (continued) (for 4514 Group)––TJ1A–TQ1ATQ2ATQ3A–––––––TW1ATW2ATW3ATW4A–TW6A––TMRATI1AT

ParameterInstruction codeFunctionNumber ofcyclesNumber ofwordsMnemonicType ofinstructionsD9 D8 D7 D6 D5 D4 D3 D2 D1 D0Hexadecimalnotation1-70HARDWARE4

Skip condition Datailed descriptionCarry flag CY4513/4514 Group User’s ManualHARDWARE1-71MACHINE INSTRUCTIONSTransfers the contents of register B to r

ParameterInstruction codeFunctionNumber ofcyclesNumber ofwordsMnemonicType ofinstructionsD9 D8 D7 D6 D5 D4 D3 D2 D1 D0Hexadecimalnotation1-72HARDWARE4

Skip condition Datailed descriptionCarry flag CY4513/4514 Group User’s ManualHARDWARE1-73MACHINE INSTRUCTIONSContinuousdescription–––Overflow = 0––––(

ParameterInstruction codeFunctionNumber ofcyclesNumber ofwordsMnemonicType ofinstructionsD9 D8 D7 D6 D5 D4 D3 D2 D1 D0Hexadecimalnotation1-74HARDWARE4

Skip condition Datailed descriptionCarry flag CY4513/4514 Group User’s ManualHARDWARE1-75MACHINE INSTRUCTIONS––––––––Skip at uncondition––(EXF0) = 1(E

ParameterInstruction codeFunctionNumber ofcyclesNumber ofwordsMnemonicType ofinstructionsD9 D8 D7 D6 D5 D4 D3 D2 D1 D0Hexadecimalnotation1-76HARDWARE4

iv4513/4514 Group User’s ManualList of figuresCHAPTER 1 HARDWAREPIN CONFIGURATION (TOP VIEW) 4513 Group ...

Skip condition Datailed descriptionCarry flag CY4513/4514 Group User’s ManualHARDWARE1-77MACHINE INSTRUCTIONSWhen bit 2 (I12) of register I1 is “1” :

ParameterInstruction codeFunctionNumber ofcyclesNumber ofwordsMnemonicType ofinstructionsD9 D8 D7 D6 D5 D4 D3 D2 D1 D0Hexadecimalnotation1-78HARDWARE4

Skip condition Datailed descriptionCarry flag CY4513/4514 Group User’s ManualHARDWARE1-79MACHINE INSTRUCTIONS––––––––––––––––––––––––(T1F) = 1(T2F) =1

ParameterInstruction codeFunctionNumber ofcyclesNumber ofwordsMnemonicType ofinstructionsD9 D8 D7 D6 D5 D4 D3 D2 D1 D0Hexadecimalnotation1-80HARDWARE4

Skip condition Datailed descriptionCarry flag CY4513/4514 Group User’s ManualHARDWARE1-81MACHINE INSTRUCTIONS––––––––––––––––––––––––––––––––––(D(Y))

ParameterInstruction codeFunctionNumber ofcyclesNumber ofwordsMnemonicType ofinstructionsD9 D8 D7 D6 D5 D4 D3 D2 D1 D0Hexadecimalnotation1-82HARDWARE4

Skip condition Datailed descriptionCarry flag CY4513/4514 Group User’s ManualHARDWARE1-83MACHINE INSTRUCTIONS–––––(SIOF) = 1––––––(ADF) = 1–––––(P) =

1-84HARDWARE4513/4514 Group User’s ManualV13V12V11V10V23V22V21V20Serial I/O interrupt enable bitA-D interrupt enable bitTimer 4 interrupt enable bitTi

4513/4514 Group User’s ManualHARDWARE1-8501010101W210011Stop (state initialized)OperatingInstruction clock divided by 4Instruction clock divided by 16

1-86HARDWARE4513/4514 Group User’s ManualSelected pinsAIN0AIN1AIN2AIN3AIN4 (Not available for the 4513 Group)AIN5 (Not available for the 4513 Group)AI