Renesas R0E572110CFK00 Información técnica descargar pdf (Pagina 56)

12. [IO] Window

• Display and modification

For each watchdog timer register, there are two registers to be separately used for write and

read operations.

Table 3.7 Watchdog Timer Register

WTCSR(W) Write Watchdog timer control/status register

WTCNT(W) Write Watchdog timer counter

WTCSR(R) Read Watchdog timer control/status register

WTCNT(R) Read Watchdog timer counter

WRCSR(W) Write Watchdog reset control/status register

WRCSR(R) Read Watchdog reset control/status register

• Customization of the I/O-register definition file

The internal I/O registers can be accessed from the [IO] window. However, note the following

when accessing the SDMR register of the bus state controller. Before accessing the SDMR

then activate the High-performance Embedded Workshop. After the I/O-register definition file

is created, the MCU’s specifications may be changed. If each I/O register in the I/O-register

definition file differs from addresses described in the hardware manual, change the I/O-register

definition file according to the description in the hardware manual. The I/O-register definition

file can be customized in accordance to its format. However, the emulator does not support the

bit-field function.

• Verification

In the [IO] window, the input values cannot be verified.

13. Illegal Instructions

Do not execute illegal instructions with STEP-type commands.

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Renesas R0E572110CFK00 Información técnica Pagina 56