Renesas M16C/6N Manual de usuario descargar pdf (Pagina 43)

Rev.2.40 Aug 25, 2006 page 41 of 84

REJ03B0004-0240

M16C/6N Group (M16C/6N5) 5. Electric Characteristics (T/V-ver.)

Under development

This document is under development and its contents are subject to change.

Figure 5.4 Timing Diagram (2)

Measuring conditions :

VCC = 5 V

Input timing voltage : Determined with V

= 1.0 V, V

= 4.0 V

Output timing voltage: Determined with V

= 2.5 V, V

= 2.5 V

BCLK

HOLD input

HLDA output

P0, P1, P2,

P3, P4,

P5_0 to P5_2

(1)

NOTE:

The above pins are set to high-impedance regardless of the input level of the BYTE pin,

the PM06 bit in the PM0 register, and the PM11 bit in the PM1 register.

Hi–Z

RDY input

BCLK

(Multiplexed bus)

WR, WRL, WRH

(Separate bus)

td(BCLK–HLDA)td(BCLK–HLDA)

th(BCLK–HOLD)tsu(HOLD–BCLK)

tsu(RDY–BCLK) th(BCLK–RDY)

Memory Expansion Mode and Microprocessor Mode

(Effective for setting with wait)

(Common to setting with wait and setting without wait)

VCC = 5 V

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Renesas M16C/6N Manual de usuario Pagina 43