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SmartBook for Renesas R8C/Tiny Microcontrollers
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Initially, both the PWM output pins are in the inactive levels. First, both TRDGRB1
and TRDGRA1 registers are compared with the contents of timer counter, TRD0.
For the compare match with the register, TRDGRB1, the output pin, TRDIOB0 is
set to its active level and the counting continues upwards. At the same time,
when a match condition happens for the register, TRDGRA1, the output pin
TRDIOA0 is set to its defined active level. The timer continues further with the
counting and for the next change at the output pins, remaining registers, TRDGRA0
and TRDGRB0 will be taken into account.
For a compare match with the register, TRDGRB0, the corresponding output pin,
TRDIOB0 changes its state from the active level to normal and inactive condition.
Since other register, TRDGRA0 contains the data meant for the PWM period, the
output pin, TRDIOA0 changes its state from the active level to complete a single
cycle of the waveform and becomes inactive. The counter is then reset to zero
and the counting operation starts again to generate the continuous PWM wave-
forms.
Operating Conditions:
PWM period: 1/fk x (m+1)
Active level width of TRDIOA0 output: 1/fk x (m-n)
Active level width of TRDIOB0 output: 1/fk x (p-q)
fk : Frequency of count source
m : Value set in the TRDGRA0 register
n : Value set in the TRDGRA1 register
p : Value set in the TRDGRB0 register
q : Value set in the TRDGRB1 register
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