Renesas Single-Chip Microcomputer M34519T-MCU Especificaciones Pagina 33
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ASSP Lineup (Dashboard Control, Body Control) (3/10)ASSP Lineup (Dashboard Control, Body Control) (2/10)
Generic Name
V850E2/FE4-L (Under development) V850E2/FF4-L (Under development)
Part No.
µPD70F3570 µPD70F3571 µPD70F3572 µPD70F3573 µPD70F3574 µPD70F3575
CPU name
V850E2S V850E2S
CPU performance (Dhrystone)
82 MIPS (@ 48 MHz) 82 MIPS (@ 48 MHz)
Internal ROM
256 KB (ash) 384 KB (ash) 512 KB (ash) 256 KB (ash) 384 KB (ash) 512 KB (ash)
Internal RAM
24 KB 28 KB 32 KB 24 KB 28 KB 32 KB
Data ash
32 KB 32 KB
External bus
interface
Bus type
- -
Address bus
- -
Data bus
- -
Chip select signal
- -
Memory controller
- -
Interrupt sources External
9 9
Timer/counter
32-bit timer: 4 ch
×
1 unit
16-bit timer: 16 ch
×
1 unit
32-bit timer: 4 ch
×
1 unit
16-bit timer: 16 ch
×
1 unit
Watchdog timer
2 ch 2 ch
Serial interface
UART (LIN compatible)
×
2 ch
CSI
×
2 ch
I
2
C
×
1 ch
CAN controller
×
1 ch
UART (LIN compatible)
×
2 ch
CSI
×
2 ch
I
2
C
×
1 ch
CAN controller
×
1 ch
A/D converter
10 bits
×
12 ch 10 bits
×
14 ch
D/A converter
- -
DMA controller
8 ch 8 ch
Ports I/O
43 57
Input
- -
Debug control unit
Provided (RUN/break/trace) Provided (RUN/break/trace)
Other peripheral functions
POC, LVI, clock monitor, key return: 8 ch POC, LVI, clock monitor, key return: 8 ch
Operating frequency
When using main clock: 48 MHz (max.)
When using high-speed internal oscillation clock: 8 MHz
When using low-speed internal oscillation clock: 240 kHz
When using main clock: 48 MHz (max.)
When using high-speed internal oscillation clock: 8 MHz
When using low-speed internal oscillation clock: 240 kHz
Power supply voltage
3.0 V to 5.5 V 3.0 V to 5.5 V
Package
64-pin LQFP (10
×
10 mm) 80-pin LQFP (12
×
12 mm)
Operating ambient temperature
-
40
°
C to
+
85
°
C,
-
40
°
C to
+
110
°
C,
-
40
°
C to
+
125
°
C
-
40
°
C to
+
85
°
C,
-
40
°
C to
+
110
°
C,
-
40
°
C to
+
125
°
C
Generic Name
V850E2/FJ4-L (Under development)
Part No.
µPD70F3581 µPD70F3582 µPD70F3583 µPD70F3584 µPD70F3585 µPD70F3586
CPU name
V850E2S
CPU performance (Dhrystone)
82 MIPS (@ 48 MHz) 109 MIPS (@ 64 MHz)
Internal ROM
256 KB (ash) 384 KB (ash) 512 KB (ash) 768 KB (ash) 1 MB (ash) 1.5 MB (ash)
Internal RAM
24 KB 28 KB 32 KB 48 KB 64 KB 96 KB
Data ash
32 KB
External bus
interface
Bus type
-
Address bus
-
Data bus
-
Chip select signal
-
Memory controller
-
Interrupt sources External
16
Timer/counter
32-bit timer: 4 ch
×
1 unit
16-bit timer: 16 ch
×
2 units
Watchdog timer
2 ch
Serial interface
UART (LIN compatible)
×
3 ch
CSI
×
3 ch
I
2
C
×
1 ch
CAN controller
×
2 ch
UART (LIN compatible)
×
5 ch
CSI
×
3 ch
I
2
C
×
1 ch
CAN controller
×
2 ch
A/D converter
10 bits
×
24 ch
D/A converter
-
DMA controller
8 ch
Ports I/O
118
Input
-
Debug control unit
Provided (RUN/break/trace)
Other peripheral functions
POC, LVI, clock monitor, key return: 8 ch
Operating frequency
When using main clock: 48 MHz (max.)
When using high-speed internal oscillation clock: 8 MHz
When using low-speed internal oscillation clock: 240 kHz
When using main clock: 64 MHz (max.)
When using high-speed internal oscillation clock: 8 MHz
When using low-speed internal oscillation clock: 240 kHz
Power supply voltage
3.0 V to 5.5 V
Package
144-pin LQFP (20
×
20 mm)
Operating ambient temperature
-
40
°
C to
+
85
°
C,
-
40
°
C to
+
110
°
C,
-
40
°
C to
+
125
°
C
Generic Name
V850E2/FK4-L (Under development)
Part No.
µPD70F3587 µPD70F3588 µPD70F3589
CPU name
V850E2S
CPU performance (Dhrystone)
109 MIPS (@ 64 MHz)
Internal ROM
768 KB (ash) 1 MB (ash) 1.5 MB (ash)
Internal RAM
48 KB 64 KB 96 KB
Data ash
32 KB
External bus
interface
Bus type
-
Address bus
-
Data bus
-
Chip select signal
-
Memory controller
-
Interrupt sources External
17
Timer/counter
32-bit timer: 4 ch
×
1 unit
16-bit timer: 16 ch
×
2 units
Watchdog timer
2 ch
Serial interface
UART (LIN compatible)
×
5 ch
CSI
×
4 ch
I
2
C
×
1 ch
CAN controller
×
2 ch
A/D converter
10 bits
×
24 ch
D/A converter
-
DMA controller
8 ch
Ports I/O
143
Input
-
Debug control unit
Provided (RUN/break/trace)
Other peripheral functions
POC, LVI, clock monitor, key return: 8 ch
Operating frequency
When using main clock: 64 MHz (max.)
When using high-speed internal oscillation clock: 8 MHz
When using low-speed internal oscillation clock: 240 kHz
Power supply voltage
3.0 V to 5.5 V
Package
176-pin LQFP (24
×
24 mm)
Operating ambient temperature
-
40
°
C to
+
85
°
C,
-
40
°
C to
+
110
°
C,
-
40
°
C to
+
125
°
C
Generic Name
V850E2/FG4-L (Under development)
Part No.
µPD70F3576 µPD70F3577 µPD70F3578 µPD70F3579 µPD70F3580
CPU name
V850E2S
CPU performance (Dhrystone)
82 MIPS (@ 48 MHz) 109 MIPS (@ 64 MHz)
Internal ROM
256 KB (ash) 384 KB (ash) 512 KB (ash) 768 KB (ash) 1 MB (ash)
Internal RAM
24 KB 28 KB 32 KB 48 KB 64 KB
Data ash
32 KB
External bus
interface
Bus type
-
Address bus
-
Data bus
-
Chip select signal
-
Memory controller
-
Interrupt sources External
13 ch
Timer/counter
32-bit timer: 4 ch
×
1 unit
16-bit timer: 16 ch
×
1 unit
Watchdog timer
2 ch
Serial interface
UART (LIN compatible)
×
3 ch
CSI
×
3 ch
I
2
C
×
1 ch
CAN controller
×
2 ch
A/D converter
10 bits
×
20 ch
D/A converter
-
DMA controller
8 ch
Ports I/O
75
Input
-
Debug control unit
Provided (RUN/break/trace)
Other peripheral functions
POC, LVI, clock monitor, key return: 8 ch
Operating frequency
When using main clock: 48 MHz (max.)
When using high-speed internal oscillation clock: 8 MHz
When using low-speed internal oscillation clock: 240 kHz
When using main clock: 64 MHz (max.)
When using high-speed internal oscillation clock: 8 MHz
When using low-speed internal oscillation clock: 240 kHz
Power supply voltage
3.0 V to 5.5 V
Package
100-pin LQFP (14
×
14 mm)
Operating ambient temperature
-
40
°
C to
+
85
°
C,
-
40
°
C to
+
110
°
C,
-
40
°
C to
+
125
°
C
64 65
- 32-bit Microcontrollers 1
- Roadmap/Features 3
- Development environment 4
- Product Lineup 10
- CPU Roadmap 13
- CPU Comparison 13
- PFESiP Roadmap 13
- V850 Architecture 14
- Object Code Size Comparison 15
- (Dhrystone 1.1/Large model) 15
- V850E2, V850E2M Architecture 16
- V850E1, V850ES Architecture 16
- Memory Access 17
- Analog Circuits 17
- Timer/Counter 18
- Serial Interface 18
- Selector 19
- Detection level selection 19
- ResistorResistorResistor 19
- Ubiquitous Corporation 20
- V850 Benchmark 21
- Low Power Consumption 21
- Solutions for V850 22
- Features 23
- Rewrite Modes 23
- Flash Specification List 23
- 5 V Operation 3 V Operation 24
- 3 V Operation 3 V Operation 25
- V850E/MA3 V850E2/ME3 29
- V850E/ME2 29
- V850E/IG4 V850E/IH4 30
- V850E/IG4-H V850E/IH4-H 30
- V850E/IG3 V850E/IF3 30
- V850E/MA3 30
- V850E/IA1 V850E/IA2 31
- V850E/IA4 V850E/IA3 31
- V850ES/HG3 V850ES/HJ3 31
- V850ES/HE3 V850ES/HF3 31
- V850ES/IK1 V850ES/IE2 32
- V850E/DJ3 V850E/DL3 32
- V850E/DG3 V850E/DJ3 32
- V850ES/FJ3 V850ES/FK3 35
- V850ES/FE3-L 36
- V850ES/FF3-L V850ES/FG3-L 36
- V850ES/FE2 V850ES/FF2 36
- V850ES/FG2 V850ES/FJ2 36
- ASSP Lineup (CAN) (1/7) 37
- V850ES/JH3-E V850ES/JJ3-E 38
- V850ES/JC3-H V850ES/JE3-H 38
- V850ES/SG3 39
- V850ES/SJ3 39
- V850E/SJ3-H 39
- V850E/SJ3-H V850E/SK3-H 40
- V850ES/SG2-H V850ES/SG2 40
- V850ES/SJ2-H V850ES/SJ2 40
- V850ES/SG1 41
- V850 Development Environment 43
- Installation 44
- Building 44
- Debugging 44
- Emulator 45
- Flash Memory Programmers 46
- Production 47
- Development Tools 48
- Microcontrollers Website 49
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