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V850E2/MN4 CSIH Control

R01AN0924EJ0100 Rev.1.00 Page 17 of 40

Feb 10, 2012

4.2.2 CSIH Control Register 2 (CSIHnCTL2)

The CSIHnCTL2 register selects the communication clock.

In master mode, the transmission baud rate can be selected by the CSIHnPRS[2:0] bits and the CSIHnBRS[11:0] bits in

the CSIHnCTL2 register. The maximum available baud rate is Pclk/4 in master mode and Pclk/6 in slave mode. The

minimum available baud rate is Pclk/524160 in both modes.

In this sample program, the communication clock is set to 64 kbps, and the CSIHnPRS[2:0] bits are set to 1, and the

CSIHnBRS[11:0] bits are set to 260.

Figure 4.7 CSIHnCTL2 Register Format

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 42 43

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Renesas MN4 Especificaciones Pagina 17