Renesas PCA4738L-64A Información técnica Pagina 51

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48
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
START/STOP
condition
control register
Oscillation
frequency
f(XIN) (MHz)
Fig. 46 Address data communication format
Fig. 45 Structure of I
2
C START/STOP condition control register
Note: Do not set “000002” or an odd number to the START/STOP condition set bit (SSC4 to SSC0).
Table 14 Recommended set value to START/STOP condition set bits (SSC4–SSC0) for each oscillation frequency
Main clock
divide ratio
System
clock φ
(MHz)
SCL release time
(µs)
Setup time
(µs)
Hold time
(µs)
10
8
8
4
2
2
2
8
2
2
XXX11110
XXX11010
XXX11000
XXX00100
XXX01100
XXX01010
XXX00100
3.2 µs (16 cycles)
3.5 µs (14 cycles)
3.25 µs (13 cycles)
3.0 µs (3 cycles)
3.5 µs (7 cycles)
3.0 µs (6 cycles)
3.0 µs (3 cycles)
6.2 µs (31 cycles)
6.75 µs (27 cycles)
6.25 µs (25 cycles)
5.0 µs (5 cycles)
6.5 µs (13 cycles)
5.5 µs (11 cycles)
5.0 µs (5 cycles)
3.0 µs (15 cycles)
3.25 µs (13 cycles)
3.0 µs (12 cycles)
2.0 µs (2 cycles)
3.0 µs (6 cycles)
2.5 µs (5 cycles)
2.0 µs (2 cycles)
5
4
1
2
1
b
7
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