Renesas PCA4738L-64A Información técnica Pagina 39

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MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3802 Group
36
When STP instruction
is executed with clock
stopped, output
transistors isolated.
Note 1: P4
5 is measured when the P45/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
P51 is measured when the P51/SOUT2 P-channel output disable bit of the serial I/O2 control register (bit 7 of address 001D16) is “0”.
2: With output transistors isolated and A-D converter having completed conversion, and not including current flowing through VREF pin.
2.0
1.0
5.0
5.0
–5.0
–5.0
5.5
13
8
2.0
1
10
“H” output voltage P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
, P5
0
–P5
7
,
P6
0
–P6
7
(Note 1)
“L” output voltage P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
,P5
0
–P5
7
,
P6
0
–P6
7
Hysteresis CNTR
0
, CNTR
1
, INT
0
–INT
4
Hysteresis R
X
D, S
CLK1
, S
IN2
, S
CLK2
Hysteresis RESET
“H” input current P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
, P5
0
–P5
7
,
P6
0
–P6
7
“H” input current RESET, CNV
SS
“H” input current X
IN
“L” input current P0
0
–P0
7
, P1
0
–P1
7
, P2
0
–P2
7
,
P3
0
–P3
7
, P4
0
–P4
7
, P5
0
–P5
7
,
P6
0
–P6
7
, RESET, CNV
SS
“L” input current RESET, CNV
SS
“L” input current X
IN
RAM hold voltage
Symbol Parameter
Limits
Min.
V
Unit
V
CC
–2.0
V
CC
–1.0
0.4
0.5
0.5
4
–4
6.4
4
0.8
1.5
1
0.2
0.1
Typ. Max.
IOH = –10 mA
VCC = 4.0 to 5.5 V
IOH = –1.0 mA
VCC = 3.0 to 5.5 V
IOL = 10 mA
VCC = 4.0 to 5.5 V
IOL = 1.0 mA
VCC = 3.0 to 5.5 V
VI = VCC
VI = VCC
VI = VCC
VI = VSS
VI = VSS
VI = VSS
When clock stopped
f(XIN) = 8 MHz, VCC = 5 V
f(XIN) = 5 MHz, VCC = 5 V
f(XIN) = 2 MHz, VCC = 3 V
Ta = 25 °C
(Note 2)
Ta = 85 °C
(Note 2)
2.0
Test conditions
VT+ – VT–
VT+ – VT–
VT+ – VT–
IIH
IIH
IIH
IIL
IIL
IIL
VRAM
VOH
VOL
ICC
V
V
V
V
µA
µA
µA
µA
µA
µA
V
mA
µA
Power source current
When WIT instruction is executed with
f(Xin) = 8MHz,V
CC=5V
When WIT instruction is executed with
f(Xin) = 5MHz,V
CC=5V
When WIT instruction is executed with
f(Xin) = 2MHz,V
CC=3V
8
±2.5
50
200
5.0
Limits
Min.
Bits
LSB
t
C(φ)
k
µA
µA
Typ. Max.
±1
35
150
0.5
Note: When D-A conversion registers (addresses 0036
16 and 003716) contain “0016”.
Resolution
Absolute accuracy (excluding quantization error)
Conversion time
Ladder resistor
Reference power source input current (Note)
A-D port input current
tCONV
RLADDER
IVREF
II(AD)
Symbol Parameter Unit
VREF = 5.0 V 50
ELECTRICAL CHARACTERISTICS (VCC = 3.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Test conditions
A–D CONVERTER CHARACTERISTICS
(VCC = 3.0 to 5.5 V, VSS = AVSS = 0 V, VREF = 2.0 V to VCC, Ta = –20 to 85 °C, unless otherwise noted)
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