Renesas H8S/2668 Series Manual de usuario descargar pdf (Pagina 3)

2. Limitations

2-1 IIC Bus Interface 1

(1) Limitation on issuing the halt condition

When there is a slave device that inserts a wait by driving SCL at the low level, issue the halt condition after the

slave device has released SCL. The halt condition is not correctly issued during the low period of SCL.

Slave device is

driven at low

9th clock

SCL

SDA

Issue the halt condition

Slave device

releases SCL

Figure 2-1 Timing for Issuing the Halt Condition

(2) Limitation on automatically switching the slave transmit mode

In slave transmit mode, set the ACKE bit (to test and select the acknowledge bit) to 1 after the falling edge of

the ninth clock where the slave address has been matched.

SCL

SDA

9th clock

Slave reception

Slave transmission

Bit 7 Bit 6

ACKE

TDRE

Set 1 to ACKE

Figure 2-2 Timing for Setting ACKE

1 2 3 4 5 6

Sin comentarios

Renesas H8S/2668 Series Manual de usuario Pagina 3