
Rev. 1.1
R8C25 QuickDesign Guide.doc Page 9 of 10 12/23/2007
6. The CPU gets interrupt information (interrupt number and interrupt request
level) by reading address 00000h.
7. The IR bit for the corresponding interrupt is set to 0 (interrupt not requested))
8. The FLG register is saved to a temporary register(1) in the CPU immediately
before entering the interrupt sequence.
9. The I, D and U flags in the FLG register are set as follows:
• The I flag is set to 0 (interrupts disabled).
• The D flag is set to 0 (single-step interrupt disabled).
• The U flag is set to 0 (ISP selected).
However, the U flag does not change state if an INT instruction for
software interrupt number 32 to 63 is executed.
10. The CPU’s internal temporary register is saved to the stack.
11. The PC is saved to the stack.
12. The interrupt priority level of the acknowledged interrupt is set in the IPL.
13. The starting address of the interrupt routine set in the interrupt vector is stored
in the PC.
8.5. Using R8C Interrupts
8.5.1. Clearing the Request Bit and Multiple Interrupts
• Note that the IR bit for the interrupt is cleared prior to entering the ISR. If a
second interrupt cause for the same peripheral happens while in the ISR that
occurrence will be latched and the MCU will immediately re-enter the ISR it
just finished. Some common issues that this causes:
• Switches bouncing will be recorded as two or more “pushes”
• A timer can actually “lock” the code by continually looping the ISR if the ISR
is longer than the delay time of the timer
8.5.2. User Stack and Interrupt Stack Pointers
Note that the status of the U flag (user stack flag) is stored prior to entering the
interrupt and restored when the interrupt ends. The Interrupt stack is always used
to store the PC and flag information for the interrupt. Therefore there must
always be a valid interrupt stack space and stack pointer. However, a user stack is
not required if the U flag is never set to 1 by the program, the MCU hardware
does not set the flag to 1, it only restores it to the value prior to the ISR ( The U
flag is cleared after reset so the default stack is the interrupt stack)
8.5.3. Code and ISR’s
• Make sure all ISR’s are declared using the #pragma INTERRUPT {function
declaration}. So the compiler will use a REIT (return from interrupt)
instruction rather than RTS (return from subroutine) instruction
• If the interrupt declaration is made using the following notation
#pragma INTERRUPT {function declaration} /B
The compiler will automatically use bank switching rather than stack pushes
to save the contents of the core register, improving ISR response
• If the interrupt declaration is made using the following notation
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