
µ
PD70F3003A, 70F3025A, 70F3003A(A)
10
Data Sheet U13189EJ5V1DS
(2/2)
Pin Name I/O Function Alternate Function
SCK0 I/O Serial clock I/O for CSI0 to CSI3 (3-wire) P24
SCK1 P27
SCK2 P17/INTP123
SCK3 P37/INTP133
TXD0 Output Serial transmit data output of UART0 to UART1 P22/SO0
TXD1 P25/SO1
RXD0 Input Serial receive data input of UART0 to UART1 P23/SI0
RXD1 P26/SI1
PWM0 Output Pulse signal output of PWM P20
PWM1 P21
AD0 to AD7 I/O 16-bit multiplexed address/data bus when external memory is connected P40 to P47
AD8 to AD15 P50 to P57
A16 to A19 Output Higher address bus when external memory is connected P60 to P63
LBEN Output Lower byte enable signal output of external data bus P90
UBEN Higher byte enable signal output of external data bus P91
R/W Output External read/write status output P92
DSTB External data strobe signal output P93
ASTB External address strobe signal output P94
HLDAK Output Bus hold acknowledge output P95
HLDRQ Input Bus hold request input P96
ANI0 to ANI7 Input Analog input to A/D converter P70 to P77
ANO0, ANO1 Output Analog output of D/A converter —
NMI Input Non-maskable interrupt request input —
CLKOUT Output System clock output —
CKSEL Input Input specifying operation mode of clock generator CVDD
WAIT Input Control signal input inserting wait state in bus cycle —
MODE Input Operation mode specification —
RESET Input System reset input —
X1 Input System clock resonator connection. Input external clock to X1 to —
X2 — supply external clock. —
ADTRG Input A/D converter external trigger input P07/INTP113
AVREF1 Input Reference voltage input for A/D converter —
AVREF2 Input Reference voltage input for D/A converter —
AVREF3 —
AVDD — Positive power supply for A/D converter —
AVSS — Ground potential for A/D converter —
CVDD — Positive power supply for internal clock generator CKSEL
CVSS — Ground potential for internal clock generator —
VDD — Positive power supply —
VSS — Ground potential —
VPP — High voltage application pin when program is written/verified —
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