Renesas Renasas Single-Chip Microcomputer SH7086 Información técnica descargar pdf (Pagina 105)

Flash Development Toolkit

Method for Using the User Program Mode (SH7086 Application)

7.5 Module Specifications

Specifications of the library modules are shown below for reference.

For details, see the hardware manual.

(1) Transfer start

Name Transfer start

Type None

Library is transferred by setting the SCO bit of FCCS register to 1.

Functionality Program transfer

Parameter None

Input For the write library, the PPVS bit (bit 0) of the FPCS register is set to 1.

For the erase library, the EPVB bit (bit 0) of the FECS register is set to 1.

The transfer destination address of RAM is specified in the FTDAR register.

The FKEY register is set to H'A5.

The first byte of transfer destination address in RAM is set to H'FF.

The VBR register is set to H'84000000.

Return value None

Output TDER bit (bit 7) of FTDAR register: Parameter check flag

Terminated normally: 0

FTDAR register value abnormal: 1 (download is aborted)

First byte of transfer destination address in RAM: Processing result

Terminated normally: H'00

FKEY register value abnormal: H'03

Multiple selections error: H'05

Processing Determines the library to transfer from the PPVS bit of FPCS register and the EPVB bit of FECS

If library selection is abnormal, returns from the module after setting the processing result

Unless FKEY is H'A5, returns from the module after setting the TDER bit to 1

Transfers the library to the RAM address specified by FTDAR

Clears the SCO bit to 0

Return to the instruction next to the one that set the SCO bit.

(2) Erase initialization

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Renesas Renasas Single-Chip Microcomputer SH7086 Información técnica Pagina 105