
JA2
Pin Header Name CPU board
Signal Name
Device Pin Pin Header Name CPU board
Signal Name
Device Pin
1 RESn RESn 22 14 Un M1_Un 120*
2 EXTAL CON_EXTAL 26* 15 Vp M1_Vp 116*
3 NMIn NMI 11 16 Vn M1_Vn 115*
4 Vss1 GROUND 14 17 Wp M1_Wp 70*
5 WDT_OVF WDT_OVFn 19 18 Wn M1_Wn 69*
6 SCIaTX TxD0 60* 19 TMR0 TMR0 117*
7 IRQ0 IRQ0 92 20 TMR1 TMR1 120*
8 SCIaRX RXD0 59* 21 TRIGa TRIGa 115*
9 IRQ1 IRQ1n 87 22 TRIGb TRIGb 116*
10 SCIaCK SCK0 --- 23 IRQ2 IRQ6 88
11 UD UD 82* 24 TRISTn M1_TRISTn 91
12 CTSRTS --- --- 25 Reserved
13 Up M1_Up 117* 26 Reserved
Table 9-6: JA2 Standard Generic Header
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