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Renesas Single-Chip Microcomputer M38C89T-ADF Manual de usuario Pagina 73

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Rev.1.00 May 22 2012
REJ09B0566
4-53
3BLibrary Reference
R_BSC_CreateArea
4
4.2.5 36BBus State Controller
[data14]
The minimum number of wait cycles from issuing the ACTV command to issuing the READ (A)/WRIT (A)
command (WTRCD). Valid between 0 and 3.
[data15]
Specify the CAS latency for area 3 (A3CL). Valid between 0 and 3.
[data16]
The number of minimum auto-precharge startup wait cycles (TRWL). Valid between 0 and 3.
[data17]
Number of Idle Cycles from REF Command/Self-Refresh Release to ACTV/REF/MRS Command (WTRC).
Valid between 0 and 3.
[data18]
The number of delay cycles from address output to RD/WE assertion for the memory card or to
ICIORD/ICIOWR assertion for the I/O card in PCMCIA interface (TED). Valid between 0 and 15.
[data19]
The number of wait cycles to be inserted (PCW). Valid between 0 and 15.
[data20]
The number of address hold cycles from RD/WE negation for the memory card or those from
ICIORD/ICIOWR negation for the I/O card in PCMCIA interface (TEH). Valid between 0 and 15.
[data21]
The number of idle cycles to be inserted after the access to a memory that is connected to the space. (IWW).
Valid between 0 and 7.
[data22]
The number of idle cycles to be inserted after the access to a memory that is connected to the space
(IWRWD). Valid between 0 and 7.
[data23]
The number of idle cycles to be inserted after the access to a memory that is connected to the space
(IWRWS). Valid between 0 and 7.
[data24]
The number of idle cycles to be inserted after the access to a memory that is connected to the space
(IWRRD). Valid between 0 and 7.
[data25]
The number of idle cycles to be inserted after the access to a memory that is connected to the space (IWRRS).
Valid between 0 and 7.
[data26]
The number of idle cycles to be inserted after an access to an external device with DACK when DMA single
address transfer is performed (IDMAIW). Valid between 0 and 7.
Return value
True if all parameters are valid and exclusive; otherwise false.
Category
Bus Controller
Reference
R_BSC_Create, R_BSC_Destroy
Remarks • Ensure that function R_BSC_Create is called once before using this function.
• The endian mode of the CPU is selected by the MDE pin (low = little endian; high = big endian).
• The cycle count parameters are not checked for validity.
• Port Function Control registers PFCR0 and PFCR5 are modified by this function.
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