
12
4
44
4.
..
.2
22
2A
AA
Acce
ccecce
ccess
ss ss
ss S
SS
St
tt
ta
aa
at
tt
tu
uu
us
ss
s
Table 4.2 lists the parameters for access status (Status) that can be specified with HDI command
line interface or displayed as trace results.
Table 4.2 Access Status Parameters
HDI Parameter
(Trace Display) Access Status Description
dmac On-chip DMAC Access by the MCU's DMAC
dtc On-chip DTC Access by the MCU's DTC
refresh Refresh Refresh cycle by the MCU's refresh
controller
prefetch
(PROG)
CPU prefetch Instruction prefetch cycle by the CPU
data
(DATA)
CPU data access Data access for instruction execution
by the CPU
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