Renesas User System Interface Cable HS36049ECH61H Manual de usuario descargar pdf (Pagina 11)

Peripherals

On-chip Peripherals: Timers

Select clock

Bus interface

Clock

Internal data bus

DADRA

DADRB

PWX1

Internal clock

PWX0

Fine–adjustment pulse addition

Legend:

DACR: PWM D/A control register

DADRA: PWM D/A data register A

DADRB: PWM D/A data register B

DACNT: PWM D/A counter

DACR

Control

logic

Base cycle compare match A

Base cycle compare match B

Base cycle overflow

Module data bus

Comparator

DACNT

Internal clock

32KOVI (IRQ15)

(Interrupt

request signal)

SUBCK/64

SUBCK/256

SUBCK/32

SUBCK/128

Clock

Counter

TCNT32K TCR32K

Module bus

Clock

Select

Bus

Interface

Internal bus

TK32K

H8S 32K Sleep Mode Timer Block Diagram

■ Timers

• Rich suite of 8-bit and

16-bit multifunction,

multipurpose timers

– Input capture, output

compare, auto reload,

event counter, up/down

counter, interval timer,

and sleep mode timer

• 3-phase Motor Control

Timer

– 2-phase encoder with

up/down count

capability

– Suitable for motor

control apps

• Asynchronous Event

Counter (AEC)

– Counts events even when

system clock is disabled

for power saving

• Watchdog timer (WDT)

with independent RC

circuit for greater safety

• 10-bit or 14-bit

Pulse Width Modulation

(PWM) timer with

ripple-reduction feature

– Can be used as a D/A

converter by adding an

external low-pass filter

• Real-Time Clock (RTC):

seconds, minutes, hours,

days and weeks

H8/Tiny 14-bit PWM Timer Block Diagram

■ Programmable Pulse Generator (PPG) / Timing Pattern Controller (TPC)

• Arbitrary waveform patterns are stored in memory and generated on

output pins with the PPG or TPC in conjunction with a timer and DMA

• Provides 8/16-bit programmable pulse outputs using TPU as base

• Output trigger signals can be selected in 4-bit groups

• Each group can operate both simultaneously and independently

• Output trigger signals can operate in parallel with DTC and DMAC

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