Renesas Asynchronous SH7145F Manual de usuario descargar pdf (Pagina 8)

SH7145F

Asynchronous Serial Data Transmission

REJ06B0355-0100O/Rev.1.00 March 2004 Page 6 of 16

3. Operation

Figure 3 shows the operation of asynchronous mode data transmission in the task example. To

help explain figure 3, table 3 lists the software and hardware processing that is performed.

TDR_1

(register)

TSR_1

(register)

TXD1

(pin)

TDRE

(SSR_1 bit)

Note: The start bit, transmit data, parity bit, and stop bit are output, in that order, from the TxD1 pin.

(1) (2) (3) (4) (5) (6) (7) (8)

Start

bit

Start

bit

Data bits D0 to D7

Stop

bit

Figure 3 Data Transmission Operation

Table 3 Processing

Software Processing Hardware Processing

(1) Write transmit data to TDR_1 —

(2) Clear TDRE flag in SSR_1 to 0 —

(3) — TransferdatafromTDR_1toTSR_1

(4) — Set TDRE flag in SSR_1 to 1 and output

transmit data from pin TXD1

(5) Confirm TDRE is 1 and send next transmit

datatoTDR_1

—

(6) Clear TDRE flag in SSR_1 to 0

(7) — TransferdatafromTDR_1toTSR_1

(8) — When output of previous data finishes, set

TDRE flag in SSR_1 to 1 and output

transfer data from pin TXD1

(9) Repeat Repeat

1 2 3 4 5 6 7 8 9 10 11 12 13 ... 17 18

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