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M16C/30P Group 5. Electrical Characteristics
Rev.1.22 Mar 30, 2007 Page 50 of 53
REJ03B0088-0122
Figure 5.11 Timing Diagram (3)
Memory Expansion Mode, Microprocessor Mode
(Effective for setting with wait)
BCLK
HOLD input
HLDA output
Measuring conditions :
· V
CC1=VCC2=3V
· Input timing voltage : Determined with V
IL=0.6V, VIH=2.4V
· Output timing voltage : Determined with V
OL=1.5V, VOH=1.5V
P0, P1, P2,
P3, P4,
P5_0 to P5_2
(1)
(Common to setting with wait and setting without wait)
NOTES:
1. These pins are set to high-impedance regardless of the input level of the BYTE pin,
PM06 bit in PM0 register.
th(BCLKHOLD)
tsu(HOLDBCLK)
td(BCLKHLDA)td(BCLKHLDA)
HiZ
RDY input
tsu(RDYBCLK)
th(BCLKRDY)
RD
BCLK
(Separate bus)
WR, WRL, WRH
(Separate bus)
VCC1=VCC2=3V
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