Renesas M16C/30P Manual de usuario descargar pdf (Pagina 53)

M16C/30P Group 5. Electrical Characteristics

Rev.1.22 Mar 30, 2007 Page 51 of 53

REJ03B0088-0122

Figure 5.12 Timing Diagram (4)

BCLK

CSi

td(BCLK-CS)

30ns.max

ADi

30ns.max

ALE

30ns.max

-4ns.min

RD

30ns.max

th(BCLK-RD)

0ns.min

th(BCLK-AD)

0ns.min

th(BCLK-CS)

0ns.min

Hi-Z

DBi

th(RD-DB)

0ns.min

0ns.min

th(RD-AD)

BHE

tcyc

Read timing

td(BCLK-AD)

td(BCLK-ALE)

th(BCLK-ALE)

tsu(DB-RD)

td(BCLK-RD)

50ns.min

tac1(RD-DB)

Memory Expansion Mode, Microprocessor Mode

(for setting with no wait)

Measuring conditions

· V

CC1=VCC2=3V

· Input timing voltage : V

IL=0.6V, VIH=2.4V

· Output timing voltage : V

OL=1.5V, VOH=1.5V

WR, WRL,

WRH

30ns.max

th(BCLK-WR)

0ns.min

BCLK

CSi

td(BCLK-CS)

30ns.max

ADi

td(BCLK-AD)

30ns.max

ALE

30ns.max

td(BCLK-ALE)

th(BCLK-ALE)

-4ns.min

th(BCLK-AD)

0ns.min

th(BCLK-CS)

0ns.min

tcyc

th(WR-AD)

BHE

td(BCLK-DB)

40ns.max

4ns.min

th(BCLK-DB)

td(DB-WR)

(0.5 × tcyc-40)ns.min

th(WR-DB)

DBi

Write timing

td(BCLK-WR)

Hi-Z

(0.5 × tcyc-60)ns.max

tcyc=

1

f(BCLK)

(0.5 × tcyc-10)ns.min

(0.5 × tcyc-10)ns.min

VCC1=VCC2=3V

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