
QDK™
M16C/Neutrino-NC30
www.state-machine.com/m16c
6 The Quantum Spy (QS) Instrumentation
This QDK demonstrates how to use the QS software tracing instrumentation to generate real-time
trace of a running QP application. Normally, the QS instrumentation is inactive and does not add
any overhead to your application, but you can turn the instrumentation on by defining the
Q_SPY
macro and recompiling the code.
QS is a software tracing facility built into all QP components and also available to the Application
code. QS allows you to gain unprecedented visibility into your application by selectively logging al-
most all interesting events occurring within state machines, the framework, the kernel, and your
application code. QS software tracing is minimally intrusive, offers precise time-stamping, sophisti-
cated runtime filtering of events, and good data compression (see Chapter 11 in PSiCC2 [PSiCC2]).
QS can be configured to send the trace data out of the serial port of the target device. On the
M16C/Neutrino baord, QS uses the built-in UART2 to send the trace data to the host. The QS plat-
form-dependent implementation is located in the file
bsp.c
and looks as follows:
(1) #ifdef Q_SPY
(2) #define QS_BUF_SIZE (2*256)
(3) #define QS_BAUD_RATE 115200
enum AppRecords { /* application-specific trace records */
PHILO_STAT = QS_USER
};
/* number of underflows of Timer A1 */
(4) static uint16_t l_nTimerA1Underflows = 1;
(5) uint8_t QS_onStartup(void const *arg) {
(6)
static uint8_t qsBuf[QS_BUF_SIZE]
; /* buffer for Quantum Spy */
uint16_t n;
(7)
QS_initBuf(qsBuf, sizeof(qsBuf))
;
/* UART0 configuration */
(8) /* UART2 configuration */
stac_u2smr2 = 1; /* enable UART2 */
pd7_0 = 1; /* set UART2 TX pin as output */
pd7_1 = 0; /* set UART2 RX pin as input */
/* set UART1 bit rate generator... */
/* bit rate can be calculated by:
* bit rate = ((BRG_count_source / 16)/baud_rate) - 1
* the value of BCLK does not affect BRG count source
*/
u2brg = (uint8_t)(((f1_CLK_SPEED/16 + BAUD_RATE/2) / BAUD_RATE) - 1);
/* 00000101 8 bit, internal clock, 1 stop, no parity, no inversion
* b2:b0 SMD2:0 Selects Uart mode, 8 bit data transfer
* b3 CKDIR Internal clock selected
* b4 STPS One stop bit
* b5 PRY Odd parity (parity is disabled using b6)
* b6 PRYE Disable parity
* b7 Reserved, set to 0
*/
u2mr = 0x05;
/* 00010000 MSB first, cmos output, CTS/RTS disabled, f1 clock source
* b1:b0 CLK1:0 Count source divided by 1
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