Renesas R8C/17 Información técnica descargar pdf (Pagina 19)

R8C/16 Group, R8C/17 Group 4. Special Function Register (SFR)

Rev.2.00 Jan 30, 2006 Page 17 of 35

REJ03B0101-0200

Table 4.3 SFR Information(3)

(1)

X: Undefined

NOTES:

1. Blank spaces are reserved. No access is allowed.

2. When output compare mode (the TCC13 bit in the TCC1 register = 1) is selected, the value after reset is “FFFFh”.

Address Register Symbol After Reset

0080h Timer Z Mode Register TZMR 00h

0081h

0082h

0083h

0084h Timer Z Waveform Output Control Register PUM 00h

0085h Prescaler Z Register PREZ FFh

0086h Timer Z Secondary Register TZSC FFh

0087h Timer Z Primary Register TZPR FFh

0088h

0089h

008Ah Timer Z Output Control Register TZOC 00h

008Bh Timer X Mode Register TXMR 00h

008Ch Prescaler X Register PREX FFh

008Dh Timer X Register TX FFh

008Eh Timer Count Source Setting Register TCSS 00h

008Fh

0090h Timer C Register TC 00h

0091h 00h

0092h

0093h

0094h

0095h

0096h External Input Enable Register INTEN 00h

0097h

0098h Key Input Enable Register KIEN 00h

0099h

009Ah Timer C Control Register 0 TCC0 00h

009Bh Timer C Control Register 1 TCC1 00h

009Ch Capture, Compare 0 Register TM0 00h

009Dh

00h

(2)

009Eh Compare 1 Register TM1 FFh

009Fh FFh

00A0h UART0 Transmit/Receive Mode Register U0MR 00h

00A1h UART0 Bit Rate Register U0BRG XXh

00A2h UART0 Transmit Buffer Register U0TB XXh

00A3h XXh

00A4h UART0 Transmit/Receive Control Register 0 U0C0 00001000b

00A5h UART0 Transmit/Receive Control Register 1 U0C1 00000010b

00A6h UART0 Receive Buffer Register U0RB XXh

00A7h XXh

00A8h

00A9h

00AAh

00ABh

00ACh

00ADh

00AEh

00AFh

00B0h UART Transmit/Receive Control Register 2 UCON 00h

00B1h

00B2h

00B3h

00B4h

00B5h

00B6h

00B7h

00B8h IIC bus Control Register 1 ICCR1 00h

00B9h IIC bus Control Register 2 ICCR2 7Dh

00BAh IIC bus Mode Register ICMR 18h

00BBh IIC bus Interrupt Enable Register ICIER 00h

00BCh IIC bus Status Register ICSR 00h

00BDh Slave Address Register SAR 00h

00BEh IIC bus Transmit Data Register ICDRT FFh

00BFh IIC bus Receive Data Register ICDRR FFh

1 2 ... 14 15 16 17 18 19 20 21 22 23 24 ... 39 40

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