
37
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3822 Group
MITSUBISHI MICROCOMPUTERS
LCD Display RAM
Address 004016 to 004F16 is the designated RAM for the LCD dis-
play. When “1” are written to these addresses, the corresponding
segments of the LCD display panel are turned on.
Fig. 35 LCD display RAM map
LCD Drive Timing
The LCDCK timing frequency (LCD drive timing) is generated in-
ternally and the frame frequency can be determined with the
following equation;
f(LCDCK) =
Frame frequency =
(frequency of count source for LCDCK)
(divider division ratio for LCD)
f(LCDCK)
(duty ratio)
B
i
t
A
d
d
r
e
s
s
7
0
0
4
01
6
0
0
4
11
6
0
0
4
21
6
0
0
4
31
6
0
0
4
41
6
0
0
4
51
6
0
0
4
61
6
0
0
4
71
6
0
0
4
81
6
0
0
4
91
6
0
0
4
A1
6
0
0
4
B1
6
0
0
4
C1
6
0
0
4
D1
6
0
0
4
E1
6
0
0
4
F1
6
C
O
M3
01
2
3456
C
O
M0
COM1 C
O
M2
COM3
C
O
M0COM1C
O
M2
S
E
G1
S
E
G3
S
E
G5
S
E
G7
S
E
G9
S
E
G1
1
S
E
G1
3
S
E
G1
5
S
E
G1
7
S
E
G1
9
S
E
G2
1
S
E
G2
3
S
E
G2
5
S
E
G2
7
S
E
G2
9
S
E
G3
1
SEG0
SEG2
SEG4
SEG6
SEG8
SEG10
SEG12
SEG14
SEG16
SEG18
SEG20
SEG22
SEG24
SEG26
SEG28
SEG30
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