Renesas PCA7401 Información técnica descargar pdf (Pagina 38)

MITSUBISHI MICROCOMPUTERS

M37270MF-XXXSP

M37270EF-XXXSP, M37270EFSP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

Fig. 34. Sync pulse counter register

Sync pulse counter register

(SYC : address 00EA16)

Count value

Count source Count time

0: H

SYNC

signal

1: Composite

sync signal

f(X

IN)/2

(1024 s, f(XIN) = 8 MHz)

(12) Synchronizing Signal Counter

The synchronizing signal counter counts the composite sync signal

taken out from a video signal in the data slicer circuit or the vertical

synchronizing signal V

sep as a count source.

The count value in a certain time (T time) generated by f(X

IN)/2

f(X

IN)/2

is stored into the 5-bit latch. Accordingly, the latch value

changes in the cycle of T time. When the count value exceeds “1F

16,”

“1F

16” is stored into the latch.

The latch value can be obtained by reading out the sync pulse counter

16). A count source is selected by bit 5 of the

sync pulse counter register.

The synchronizing signal counter is used when bit 0 of the PWM

mode register 1 (address 02EA

16).

Figure 34 shows the structure of the sync pulse counter and Figure

35 shows the synchronizing signal counter block diagram.

Fig. 35. Synchronizing signal counter block diagram

Reset

5-bit counter

Latch (5 bits)

f(XIN)/2

Composite

sync signal

SYNC signal

Counter

Sync pulse

counter register

Data bus

Selection gate : connected to black

colored side when

reset.

1 2 ... 33 34 35 36 37 38 39 40 41 42 43 ... 96 97

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