Renesas PCA7401 Información técnica Pagina 89

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MITSUBISHI MICROCOMPUTERS
M37270MF-XXXSP
M37270EF-XXXSP, M37270EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
86
A-D CONVERTER CHARACTERISTICS
(V
CC
= 5 V ± 10 %, V
SS
= 0 V, f(X
IN
) = 8 MHz, T
a
= –10 °C to 70 °C, unless otherwise noted)
Resolution
Non-linearity error
Differential non-linearity error
Zero transition error
Full-scale transition error
Conversion time
Reference voltage
Ladder resistor
Analog input current
Max.
8
±2
±0.9
2
4
12.5
VCC
VREF
bits
LSB
LSB
LSB
LSB
µs
V
k
V
Min.
0
0
0
0
12.25
0
Limits
Typ.
UnitTest conditions
Parameter
Symbol
V
OT
VFST
TCONV
VREF
RLADDER
VIA
VCC = 5.12V
IOL (SUM) = 0mA
VCC = 5.12V
25
MULTI-MASTER I
2
C-BUS BUS LINE CHARACTERISTICS
Bus free time
Hold time for START condition
“L” period of SCL clock
Rising time of both SCL and SDA signals
Data hold time
“H” period of SCL clock
Falling time of both SCL and SDA signals
Data set-up time
Set-up time for repeated START condition
Set-up time for STOP condition
tBUF
tHD:STA
tLOW
tR
tHD:DAT
tHIGH
tF
tSU:DAT
tSU:STA
tSU:STO
Max.
1000
300
Min.
1.3
0.6
1.3
20+0.1Cb
0
0.6
20+0.1Cb
100
0.6
0.6
Max.
300
0.9
300
µs
µs
µs
ns
µs
µs
ns
ns
µs
µs
Unit
Standard clock mode High-speed clock mode
ParameterSymbol
Note: Cb = total capacitance of 1 bus line
Fig. 98. Definition diagram of timing on multi-master I
2
C-BUS
Min.
4.7
4.0
4.7
0
4.0
250
4.7
4.0
SDA
SCL
p
tBUF
S
tHD:STA
tLOW
tR
tHD:DAT tHIGH
tF
tSU:DAT tSU:STA
Sr
p
tSU:STO
tHD:STA
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