Renesas Single-Chip Microcomputer SH7203 Información técnica Pagina 13

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CAN0 CAN1
Pin Circuit Net Name Device Pin Pin Circuit Net Name Device Pin
1 CTx0 86* 1 CTx1 88*
2 GROUND - 2 GROUND -
3 CRx0 85* 3 CRx1 87*
* - The RCAN transceivers translate the voltage levels on CPU pin to meet RCAN voltage level standards.
Table 6-5 RCAN Connectors
For more details on SH7203 on-chip RCAN module, please refer to SH7203 Group Hardware Manual.
6.7. USB
The USB 2.0 host/function module (USB) provides capabilities as a USB host and USB function. It supports high-speed and full-speed
transfers defined by USB specification 2.0. The Low speed mode is not supported. This module has a USB transceiver and supports all of
the transfer types defined by the USB specification. The module has an 8-kbyte on-chip buffer memory for data transfer, providing a
maximum of eight pipes. Any endpoint numbers can be assigned to PIPE1 to PIPE7, based on the peripheral devices or user system for
communication. Please note that, a 5V power supply needs to be used while connecting a USB powered device (to the USB Host
connector of the RSK+SH7203) if more than 25mA current is required to be sourced. See
3.1.
Table 6-6 below details the USB connectors available on this RSK+ board.
USB_H (USB Host) USB_D (USB Device / Function)
Pin Circuit Net Name Device Pin Pin Circuit Net Name Device Pin
1 HOST_VBUS See SW4-2
to SW4-5
1 DEVICE_VBUS* See SW4-2
to SW4-5
2 USD - 100 2 USD - 100
3 USD + 101 3 USD + 101
4 GROUND - 4 NC -
5 GROUND -
* - The connection is via SW4-5.
Table 6-6 USB Connectors
For more details on SH7203 on-chip USB module, please refer to SH7203 Group Hardware Manual.
6.8. ETHERNET
The network functionality is provided by the SMCS LAN9118-MT non-PCI Ethernet controller. The Ethernet controller is configured to
use a 16 bit data bus. It uses single 16 bit read and write strobes. Byte or long word accesses are not available for this device. The chip
select used for the network controller is CS1n.
Refer to the SMCS LAN9118-MT datasheet for more information on this peripheral.
6.9. LCD Interface
Unified memory architecture is adopted for the LCD controller (LCDC) so that the image data for display is stored in system memory. The
LCDC module reads data from system memory, uses the palette memory to determine the colours, and then puts the display on the LCD
9
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