
FLG
R2
R3
A0
A1
SVF
SVP
VCT
SB
FB
USP
ISP
INTB
PC
R2
R0H R0LR2
R1H R1L
R2H R2L
R3H R3L
R0H R0L
R1H R1LR3
b0b15
FLG
b0b31
b31
0b0bb1
b23
b23
R6
R7
R4
R5
A0
A1
A2
A3
SB
FB
USP
ISP
INTB
PC
VCT
SVP
SVF
Basic registers
High-speed
interrupt registers
M32C/80 Series R32C/100 Series
Vector register
PC save register
Flag save register
Flag register
Data registers
Address registers
Static base register
Frame base register
User stack pointer
Interrupt stack pointer
Interrupt table register
Program counter
: Added in R32C/100
b31
DMD0
b0b7
DMD0
b31 b0
DCT0
DRC0
b15
b23
DCT0
DCR0
DSA0
DSR0
DDA0
DDR0
DSA0
DRA0
DMA0
2 dedicated DMA registers
4 dedicated DMA registers
DMA mode register
DMA terminal count register
DMA terminal count reload register
DMA source address register
DMA source address reload register
DMA destination address register
DMA destination address reload register
DMA-related
UART
CPU
RAM
DMA Applications
• Automatic serial I/O transfers
• Motor drive using microsteps
• Multichannel PWM output (max. 64)
Transfer of
multiple
bytes by a
single event
Memory Memory
Event
DMA-II / DTC Applications
Transfer of
data to
multiple
addresses
by a single
event
Port0
RAM
Port1
RAM
Port2
RAM
Event
Top Reasons to select the M16C Platform
™
6
DMA Function
DMA, which transfers data
without CPU intervention,
supports up to four channels.
The DMA-II/DTC function
provides many other memory
transfer capabilities, such as
transfer of multiple bytes by
a single event and transfer of
data to multiple addresses by a
single event (M32C/80 core,
R32C/100 core).
■ REASON #3: POWERFUL ARCHITECTURE
R32C/M32C Register Model
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