
SH7080 Group
A/D Conversion in Single-cycle Scan Mode
REJ06B0699-0100/Rev.1.00 January 2008 Page 3 of 19
2. Applicable Conditions
The applicable conditions for this sample application are shown in table 1.
Table 1 Applicable Conditions
Item Setting
Device SH7086 (R5F70865)
Operating frequency Internal clock: Iφ = 80 MHz
Bus clock: Bφ = 40 MHz
Peripheral clock: Pφ = 40 MHz
MTU2 clock: MPφ = 40 MHz
MTU2S clock: MIφ = 80 MHz
Operating mode
Single-chip mode
Development environment
Renesas Technology products:
High-performance Embedded Workshop Version 4.03.00.001 (integrated
development environment)
SuperH RISC engine Standard Toolchain (V.9.1.1.0)
SuperH RISC engine C/C++ Compiler (V.9.01.01)
C compiler options
High-performance Embedded Workshop default settings:
[ -cpu=sh2 -object="$(CONFIGDIR)\$(FILELEAF).obj" -debug -gbr=auto -
chgincpath -errorpath -global_volatile=0 -opt_range=all -infinite_loop=0 -
del_vacant_loop=0 -struct_alloc=1 -nologo ]
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