Renesas H8S/2628 Información técnica descargar pdf (Pagina 273)

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[Status]: Bus status during this cycle; DTC operation, PROG (prefetch), Data (CPU data access cycle),

Refresh (refresh cycle), or DMAC (DMAC cycle) (not available when a time stamp is

acquired)

[Clock]: Number of clock cycles in bus cycle as 1 to 8. To indicate more clock cycles, “OVR” is

displayed (not available when a time stamp is acquired).

[Probes]: A 4-bit binary number showing the four probe pins in the order of Probe 4, Probe 3, Probe 2,

and Probe 1 from the left (not available when a time stamp is acquired).

[NMI]: Status of the NMI input (not available when a time stamp is acquired)

[IRQ7-0]: Status of eight IRQ inputs (not available when a time stamp is acquired)

[Timestamp]: Time stamp of the record. Time stamps start from zero each time the user program is executed.

The timer resolution depends on the time stamp clock rate selected in the trace acquisition

(only available when a time stamp is acquired).

[Source]: Source program

[Label]: Label information that corresponds to the address (if defined)

Note: Items other than [PTR], [Address], [Instruction], [Data], [R/W], [Area], [Status], [Probes], [Timestamp],

[Source], and [Label] vary according to the emulator in use. For details, refer to section 8, Software

Specifications Specific to This Product, or the online help.

It is possible to hide any column not necessary in the [Trace] window. Selecting a column you want to hide from

the popup menu displayed by clicking the right-hand mouse button on the header column hides that column. To

display the hidden column, select the column from the said popup menu again.

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