Renesas 4513 Información técnica Pagina 27

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4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Table 7 External interrupt activated conditions
Name
External 0 interrupt
External 1 interrupt
Input pin
P30/INT0
P31/INT1
Activated condition
When the next waveform is input to P30/INT0 pin
• Falling waveform (“H”“L”)
• Rising waveform (“L”“H”)
• Both rising and falling waveforms
When the next waveform is input to P31/INT1 pin
• Falling waveform (“H”“L”)
• Rising waveform (“L”“H”)
• Both rising and falling waveforms
Valid waveform
selection bit
I11
I12
I21
I22
Fig. 17 External interrupt circuit structure
EXTERNAL INTERRUPTS
The 4513/4514 Group has two external interrupts (external 0 and
external 1). An external interrupt request occurs when a valid
waveform is input to an interrupt input pin (edge detection).
The external interrupts can be controlled with the interrupt control
registers I1 and I2.
0
1
I2
2
0
1
EXF1
I2
1
SNZI1
P3
1
/INT1
0
1
I1
2
Wakeup
Skip
0
1
EXF0
I1
1
SNZI0
P3
0
/INT0
Rising
Falling
One-sided edge
detection circuit
Both edges
detection circuit
External 0
interrupt
External 1
interrupt
Wakeup
Skip
Rising
Falling
One-sided edge
detection circuit
Both edges
detection circuit
This symbol represents a parasitic diode on the port.
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