Renesas Emulation Pod M30100T3-RPD-E Especificaciones Pagina 39

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H8S/2600 series
H8S/2612 H8S/2615 H8S/2628
64K 128K
4K
MF MFF
Yes (H/W Protect,
S/W Protect,
Error Protect)
Yes (H/W Protect,
S/W Protect,
Error Protect)
Yes (H/W Protect,
S/W Protect,
Error Protect)
–––
41.7 (@24MHz)
16 x 1632
16 x 16 + 4242
16M
1 circuits (Main clock)
Yes ( x 1, x 2, x 4)
Normal operating / Medium-speed /
Sleep / Module stop /
Software standby /
Hardware standby
10-bit x 16
Yes
4 (TMR)
6 (TPU)
6 (shared with TPU)
6 (shared with TPU)
6 (shared with TPU)
2 (shared with TMR), 4 (shared with TPU)
1
2
3
2
2
1
18 26
1
39 59
28
7 (NMI+6 (8 level) )
Yes
PRQP0080JD-A (FP-80Q) PRQP0100KB-A (FP-100M)
–40 to 85
2 circuits (Main clock, Sub clock)
Yes (128 division)
Yes (WDT for watch)
1/n (n=1, 2, 4, 8, 16, 32, 128) 1/n (n=1, 2, 4, 8, 16, 32)
Normal operating / Medium-speed /
Sleep / Module stop/Watch /
Sub active / Sub sleep/
Software standby / Hardware standby
3
2 (shared with TPU)
2
16
M
6K 8K
69
H8S/2600 core
50 (@20MHz)
DTC DTC
1 circuits (Main clock)
1/n (n=1, 2, 4, 8, 16, 32)
Normal operating / Medium-speed /
Sleep / Module stop /
Software standby /
Hardware standby
10-bit x 12
7 (1 (MMT) + 6 (TPU) )
8 (shared with TPU + PPG) 8 (shared with TPU + PPG)
1
22
1
43
28
Yes
Yes (PC break) Yes (PC break)
MMT ( x 1)
20
24
Yes
20MHz / 4.5 to 5.5V 24MHz / 4.5 to 5.5V
–40 to 85, –40 to 105, –40 to 125
64K 64K128K 96K 128K
HD6432612XXXFA H8S/2612
HD64F2612FA H8S/2612F
HD6432614XXXFA H8S/2614
HD6432616XXXFA H8S/2616
HD6432615XXXFA H8S/2615
HD64F2615FA H8S/2615F
HD6432627XXXF H8S/2627
HD6432628XXXF H8S/2628
HD64F2628F H8S/2628F
HD6432611XXXFA H8S/2611
Notes (1): F : Flash memory version L : ROM less version M : Mask ROM version O : One time PROM version Qz : Qz ROM version : New products ★★ : Under development
ROM
RAM
ROM Type
(1)
Program Security
CPU
Basic Instructions
Minimum Instruction Execution Time (ns)
Multiplier
Multiply -Accumulate Instruction
DMAC (Channels)
EXDMAC (Channels)
DTC/DMACII
Address Space (Bytes)
Bus State Controller
Bus Structure
SDRAM Controller
DRAM Controller
Host Interface
Clock Generation Circuit
PLL
Subclock
RTC
Frequency Divider
Power Save
Resolution x Channels
Sample and Hold
Resolution x Channels
8-bit Timer
16-bit Timer
32-bit Timer
Input Capture
Output Compare
PWM Output
Real-Time Port
Programmable Pulse Generator
Event Counter
2-Phase Encoder Input
Clock Sync. / Clock Async.
Channels
Message Box
Input Only (Numbers)
CMOS Output Only (Numbers)
CMOS I/O (Numbers)
High Voltage Port (Numbers)
N-Channel Open Drain Port (Numbers)
DTMF
High Current Drive Port
Pull-Up Resistor
NMOS Push-Pull
Boundary Scan/JTAG
On-Chip Debug
On-Board Flash Program
ROM Correction Function
Other
Memory
CPU
DMA
External Bus
Expansion
Clock
A/D Converter
D/A Converter
Timer
Watchdog Timer
Serial Interface
I
2
C-bus
IEBus
Smart Card/ SIM
SSU / Special Serial I/O
CAN
USB Function
LPC/ ISA
IrDA
LCD
CRC Calculation Circuit
I/O Ports
External Interrupt pins
Debug Function
Other Functions
PKG Code
Operating Frequency / Supply Voltage
Operating Ambient Temperature (˚C)
Group
Part No.
Series
MCU Selection Map
MCU Selection Map
47
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