Renesas Emulator System M3T-MR100 Manual de usuario descargar pdf (Pagina 11)

REJ05B1160-0101 Rev.1.01 February 2010 Page 11 of 43

M16C/62P Group, R32C/111 Group

Differences between M16C/62P and R32C/111 (100 pin ver.)

4.3 Voltage Regulator

The internal voltage of the M16C/62P is generated by reducing the input voltage from the VCC1 pin with

the voltage regulator(s). To stabilize the internal voltage, a decoupling capacitor should be connected

between pins VDC1 and BDC0. The M16C/62P does not require any decoupling capacitor. Table 4.10

lists the change on the voltage regulator control register.

4.4 Low Voltage Detection

Table 4.11 lists the changes on SFRs associated with low voltage detection.

Table 4.8 Comparison Chart: Clock Source and Divide Ratio After a Reset

Item M16C/62P R32C/111

Clock source Main clock PLL self oscillation mode

CPU clock Divide-by-8 Divide-by-12

Peripheral bus clock Divide-by-8 Divide-by-12

Other clocks N/A • Base clock: divide-by-6

• CPU clock: base clock divide-by-2

• Peripheral bus clock: base clock divide-by-2

Table 4.9 Comparison Chart: Clock Source Before a Software Reset

Item M16C/62P R32C/111

Clock source Main clock PLL clock

Table 4.10 Comparison Chart: Voltage Regulator Control Register

Symbol

Address

Bit M16C/62P R32C/111

M16C/62P R32C/111

VRCR N/A 40060h - N/A Available only in the R32C/111

Table 4.11 Comparison Chart: Low Voltage Detection-associated SFRs

Symbol

Address

Bits M16C/62P R32C/111

M16C/62P R32C/111

VCR1 0019h N/A - Available only in the M16C/62P N/A

VCR2 001Ah N/A - Available only in the M16C/62P N/A

D4INT 001Fh N/A - Available only in the M16C/62P N/A

WDC 000Fh 4404Fh 5 Coldstart/warmstart

determination flag

Reserved

LVDC N/A 40062h - N/A Available only in the R32C/111

DVCR N/A 40064h - N/A Available only in the R32C/111

1 2 ... 6 7 8 9 10 11 12 13 14 15 16 ... 42 43

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Renesas Emulator System M3T-MR100 Manual de usuario Pagina 11