Renesas Emulator System M3T-MR100 Manual de usuario descargar pdf (Pagina 22)

REJ05B1160-0101 Rev.1.01 February 2010 Page 22 of 43

M16C/62P Group, R32C/111 Group

Differences between M16C/62P and R32C/111 (100 pin ver.)

4.10 Watchdog Timer

Table 4.27 and Table 4.28 respectively list the changes on watchdog timer and associated SFRs.

Table 4.27 Comparison Chart: Watchdog Timer

Item M16C/62P R32C/111

Clock source for

watchdog timer

• CPU clock (PLL clock, main clock,

on-chip oscillator clock)

• Sub clock

• On-chip oscillator clock

Peripheral bus clock (PLL clock, sub

clock, or on-chip oscillator clock

respectively divided by CCR register

setting)

Watchdog timer prescaler

divide ratio

Divide-by-2 (when sub clock is

selected), -16, or -128

Divide-by-16, or -128

Count source protective

mode

Enabled N/A

Table 4.28 Comparison Chart: Watchdog Timer-associated SFRs

Symbol

Address

Bits M16C/62P R32C/111

M16C/62P R32C/111

CM0 0006h 40046h - Address changed

6 Main clock division select bit 0 Watchdog timer function select

bit

7 CPU clock select bit 0 Reserved

PM1 0005h N/A - Available only in the M16C/

62P

N/A

WDC 000Fh 4404Fh - Address changed

5 Coldstart/warmstart

determination bit

Reserved

WDTS 000Eh 4404Eh - Address changed

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 ... 42 43

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Renesas Emulator System M3T-MR100 Manual de usuario Pagina 22