Renesas Single-Chip Microcomputer M37531T-ADS Información técnica descargar pdf (Pagina 23)

MSC TECHNICAL NEWS

No.M16C-09-9705

GRADE

Note on using the A-D converter

of the M16C/60 series MCU

1. Related devices

M16C/60 series

2. Symptoms

After A-D conversion is complete, if the CPU reads the A-D register at the same time as the A-D conversion

result is being saved to A-D register, wrong A-D conversion value is saved into the A-D register. This happens

when the internal CPU clock is selected from divided main clock or sub-clock.

(1/1)

A-D conversion buffer

Transfer signal to A-D register

Read signal to A-D register

A-D register

Start A-D conversion

Final conversion result

A-D conversion complete

10-bit resolution:

with sample & hold is activated, 33 φ

cycles used

000H 200H001H 100H

000H 200H

The former conversion result

Normal latch signal

Start the next A-D conversion

Start A-D conversion

Wrong latch signal when

a CPU read is present

(When connected an A-D input port and GND)

Normally, A-D conversion value is saved at the rising edge (dashed rising edge) of the latch signal.

However, when the CPU is doing a read to A-D register at this time, the A-D register latch signal is

delayed, and wrong value is stored at A-D conversion register.

3. Precaution

(1) When using the one-shot or single sweep mode

Confirm that A-D conversion is complete before reading the A-D register.

(Note: When A-D conversion interrupt request bit is set, it shows that A-D conversion is completed.)

(2) When using the repeat mode or repeat sweep mode 0 or 1

Use the undivided main clock as the internal CPU clock.

Related to M16C/80, M16C/60, M16C/20 series devices.

1 2 ... 18 19 20 21 22 23 24 25 26 27 28 ... 56 57

Sin comentarios

Renesas Single-Chip Microcomputer M37531T-ADS Información técnica Pagina 23