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Renesas PCA4738L-64A Información técnica Pagina 42

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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3825 Group
39
CLOCK OUTPUT FUNCTION
Input/output ports P40 and P41 can output clock. The input/output
ports and clock output function are put under double function con-
trolled by the clock output control register (address 002A
16).
Selection of Input/Output Ports and Clock
Output Function
Bits 0 and 1 of the clock output control register can select between
the input/output ports and the clock output function.
When selecting the clock output function, clocks are output while
the direction register of ports P4
0 and P41 are set to output.
At the next cycle of rewriting the clock output control bit, P4
0 is
switched between the port output and the clock output.
In synchronization with the fall of the clock (resulting from dividing
X
IN by 5) on rewriting the clock output control bit, P41 is switched
between the port output and the clock output.
Fig. 37 Clock output function block diagram
Fig. 36 Structure of clock output control register
Selection of Output Clock Frequency
Bit 2 (output clock frequency selection bit) of the clock output con-
trol register selects an output clock frequency.
When setting the output clock frequency selection bit to “0”, port
P4
0 becomes the frequency of f(XIN) and port P41 becomes the
frequency of f(X
IN)/5.
At this time, the output pulse of port P4
0 depends on the XIN input
pulse, while the output pulse of port P4
1 has duty ratio of about
40%.
When setting the output clock frequency selection bit to “1”, port
P4
0 becomes the frequency of f(XIN)/2 and port P41 becomes the
frequency of f(X
IN)/10. At this time, the output pulses of both ports
P4
0 and P41 have duty ratio of 50%.
P
4
0
c
l
oc
k
output contro
l
bi
t
0 : I/O port
1 : Clock output
P4
1
clock output control bit
0 : I/O port
1 : Clock output
Output clock frequency selection bit
0 : P4
0
←f(X
IN
), P4
1
←f(X
IN
)/5
1 : P4
0
←f(X
IN
)/2, P4
1
←f(X
IN
)/10
Not used (return “0” when read)
Cl
oc
k
output contro
l
reg
i
ster
(TCON : address 002A
16
)
b
7
b
0
P
4
0
1
/
2
P
4
0
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
P
4
0
c
l
o
c
k
o
u
t
p
u
t
c
o
n
t
r
o
l
b
i
t
“0”
“1”
P
4
0
port
l
atc
h
“0”
“1”
O
u
t
p
u
t
c
l
o
c
k
f
r
e
q
u
e
n
c
y
s
e
l
e
c
t
i
o
n
b
i
t
X
IN
P
4
1
1
/
2
P
4
1
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
P
4
1
c
l
o
c
k
o
u
t
p
u
t
c
o
n
t
r
o
l
b
i
t
“
0
”
“
1
”
P
4
1
p
o
r
t
l
a
t
c
h
“
0
”
“
1
”
O
utput c
l
oc
k
frequency
selection bit
1
/
5
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