Renesas H8S/2111B Manual de usuario descargar pdf (Pagina 229)

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Rev. 1.00, 05/04, page 195 of 544

Table 10.3 Clock Input to TCNT and Count Condition (3)

TCR TCRAB

Channel CKS2 CKS1 CKS0 CKSA CKSB Description

TMR_B 0 0 0 — 0 Disables clock input

0 0 1 — 0 Increments at φ/4

0 1 0 — 0 Increments at φ/256

0 1 1 — 0 Increments at φ/2048

1 0 0 — 0 Disables clock input

0 0 0 — 1 Disables clock input

0 0 1 — 1 Increments at φ/4096

0 1 0 — 1 Increments at φ/8192

0 1 1 — 1 Increments at φ/16384

1 0 0 — 1 Increments at overflow signal from

TCNT_A*

1 0 1 — — Increments at rising edge of external

clock

1 1 0 — — Increments at falling edge of external

clock

1 1 1 — — Increments at both rising and falling

edges of external clock

TMR_A 0 0 0 0 — Disables clock input

0 0 1 0 — Increments at φ

0 1 0 0 — Increments at φ/2

0 1 1 0 — Increments at φ/4

1 0 0 0 — Disables clock input

0 0 0 1 — Disables clock input

0 0 1 1 — Increments at φ/2048

0 1 0 1 — Increments at φ/4096

0 1 1 1 — Increments at φ/8192

1 0 0 1 — Increments at compare-match A from

TCNT_B*

1 0 1 — — Increments at rising edge of external

clock

1 1 0 — — Increments at falling edge of external

clock

1 1 1 — — Increments at both rising and falling

edges of external clock

Notes: * If the TMR_B clock input is set as the TCNT_A overflow signal and the TMR_A clock

input is set as the TCNT_B compare-match signal simultaneously, a count-up clock

cannot be generated. These settings should not be made.

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