Renesas H8S/2111B Manual de usuario descargar pdf (Pagina 33)

Rev. 1.00, 05/04, page xxxiii of xxxiv

Table 12.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode) .... 248

Table 12.8 Serial Transfer Formats (Asynchronous Mode).................................................... 250

Table 12.9 SSR Status Flags and Receive Data Handling ...................................................... 257

Table 12.10 SCI Interrupt Sources........................................................................................ 271

Section 13 I2C Bus Interface (IIC)

Table 13.1

Pin Configuration.................................................................................................. 280

Table 13.2 Communication Format ........................................................................................ 285

Table 13.3 I

C Transfer Rate .................................................................................................. 288

Table 13.4 Flags and Transfer States (Master Mode)............................................................. 294

Table 13.5 Flags and Transfer States (Slave Mode) ............................................................... 295

Table 13.5 Flags and Transfer States (Slave Mode) (cont).....................................................296

Table 13.6 I

C Bus Data Format Symbols.............................................................................. 308

Table 13.7 IIC Interrupt Sources ............................................................................................336

Table 13.8 I

C Bus Timing (SCL and SDA Outputs)............................................................. 337

Table 13.9 Permissible SCL Rise Time (t

) Values ...............................................................338

Table 13.10 I

C Bus Timing (with Maximum Influence of t

)........................................339

Section 14 Keyboard Buffer Controller

Table 14.1

Pin Configuration.................................................................................................. 350

Section 15 Host Interface (LPC)

Table 15.1

Pin Configuration.................................................................................................. 371

Table 15.2 Register Selection ................................................................................................. 382

Table 15.3 GA20 (P81) Set/Clear Timing .............................................................................. 401

Table 15.4 Fast A20 Gate Output Signals.............................................................................. 402

Table 15.5 Scope of Host Interface Pin Shutdown ................................................................. 404

Table 15.6 Scope of Initialization in Each Host Interface Mode ............................................ 405

Table 15.7 Receive Complete Interrupts and Error Interrupt.................................................. 410

Table 15.8 HIRQ Setting and Clearing Conditions ................................................................411

Section 16 A/D Converter

Table 16.1

Pin Configuration.................................................................................................. 415

Table 16.2 Analog Input Channels and Corresponding ADDR Registers .............................. 416

Table 16.3 A/D Conversion Time (Single Mode)................................................................... 422

Section 18 ROM

Table 18.1

Differences between Boot Mode and User Program Mode ..................................433

Table 18.2 Pin Configuration.................................................................................................. 437

Table 18.3 Operating Modes and ROM..................................................................................441

Table 18.4 On-Board Programming Mode Settings ...............................................................441

Table 18.5 Boot Mode Operation ........................................................................................... 443

Table 18.6 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is

Possible................................................................................................................. 444

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Renesas H8S/2111B Manual de usuario Pagina 33

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Renesas H8S/2111B Manual de usuario Pagina 33

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