Renesas Renasas Single-Chip Microcomputer SH7086 Manual de usuario descargar pdf (Pagina 37)

Chapter 1 Overview

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1.10 Vector Table

The vector table comes in two types: a special page vector table and an interrupt vector table. The special

page vector table is a fixed vector table. The interrupt vector table can be a fixed or a variable vector table.

1.10.1 Fixed Vector Table

The fixed vector table is an address-fixed vector table. The special page vector table is allocated to

addresses FFE0016 through FFFDB16, and part of the interrupt vector table is allocated to addresses

FFFDC16 through FFFFF16. Figure 1.10.1 shows a fixed vector table.

The special page vector table is comprised of two bytes per table. Each vector table must contain the 16

low-order bits of the subroutine’s entry address. Each vector table has special page numbers (18 to

255) which are used in JSRS and JMPS instructions.

The interrupt vector table is comprised of four bytes per table. Each vector table must contain the

interrupt handler routine’s entry address.

FFFDC16

FFFE016

FFFE416

FFFE816

FFFEC16

FFFF016

FFFF416

FFFF816

FFFFC16

FFE0016

FFE0216

FFFDB16

FFFDC16

FFFFF16











Special page number

Special page

vector table

Interrupt

vector table

Figure 1.10.1 Fixed vector table

Undefined instruction

Overflow

BRK instruction

Address match

Single step

Watchdog timer

DBC

NMI

Reset

1 2 ... 32 33 34 35 36 37 38 39 40 41 42 ... 307 308

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