Renesas Renasas Single-Chip Microcomputer SH7086 Manual de usuario Pagina 85

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3.2 Functions
Chapter 3 Functions
Signed divide
DIVide
DIV.B A0 ;A0s 8 low-order bits is the divisor.
DIV.B #4
DIV.W R0
[ Related Instructions ] DIVU,DIVX,MUL,MULU
DIV DIV
[ Syntax ]
DIV.size src
B , W
[ Operation ]
If the size specifier (.size) is (.B)
R0L (quotient), R0H (remainder) R0 src
If the size specifier (.size) is (.W)
R0 (quotient), R2 (remainder) R2R0 src
[ Flag Change ]
[ Function ]
This instruction divides R2R0 (R0)
*1
by signed
src
and stores the quotient in R0 (R0L)
*1
and the re-
mainder in R2 (R0H)
*1
. The remainder has the same sign as the dividend. Shown in ( )
*1
are the
registers that are operated on when you selected (.B) for the size specifier (.size).
If
src
is an A0 or A1 when the size specifier (.size) you selected is (.B), operation is performed on the
8 low-order bits of A0 or A1.
If you specify (.B) for the size specifier (.size), the O flag is set when the operation resulted in the
quotient exceeding 8 bits or the divisor is 0. At this time, R0L and R0H are indeterminate.
If you specify (.W) for the size specifier (.size), the O flag is set when the operation resulted in the
quotient exceeding 16 bits or the divisor is 0. At this time, R0 and R2 are indeterminate.
src
R0L/R0 R0H/R1 R1L/R2 R1H/R3
A0/A0 A1/A1 [A0] [A1]
dsp:8[A0] dsp:8[A1] dsp:8[SB] dsp:8[FB]
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
dsp:20[A0] dsp:20[A1] abs20 #IMM
R2R0 R3R1 A1A0
[ Description Example ]
UIOBSZDC
Conditions
O : The flag is set when the operation resulted in the quotient exceeding 16 bits (.W) or 8 bits (.B) or
the divisor is 0; otherwise cleared.
[ Instruction Code/Number of Cycles ]
Page=
172
[ Selectable src ]
Flag
Change
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