Introduction
Market Needs SuperH Solutions
Performance
Up to 1080 MIPS, 4.2 GFLOPS (SH-4A); up to 360 MIPS (SH-2A), superscalar architecture
Cost/performance High MIPS/$ ratings
Power/performance High MIPS/W ratings
Code efficiency 16-bit instructions: up to 40% smaller memory footprint, up to 40% more data in cache
Flash ROM
Up to 1MB flash, accessible in one cycle at 80MHz; single-voltage programmable
Floating-point and DSP (SH2-DSP, SH3-DSP), superscalar FPU (SH-2A, SH-4, SH-4A)
DSP support
Graphics support Superscalar operation [FPU operations independent of non-FPU operations] (SH-2A, SH-4, SH-4A)
On-chip peripherals Timers, DSP, MMU, A/D, D/A, memory controller, LCD controller, AFE, motor controller, cache,
BSC, crypto accelerator, more
Industry-standard USB, Ethernet, PCI, SCI, I
2
C, PCMCIA, audio, CAN, Smart Card, IrDA, SDRAM, DDR-SDRAM
interfaces
Architecture roadmap Instruction set accommodates superscalar designs
Code compatibility Upward compatible families (SH-1, SH-2, SH-3, SH-4)
Power consumption Low static/dynamic operating currents, high MIPS/W ratings, power-down modes
Development Comprehensive integrated H/W and S/W tools, extensive third-party support, on-chip debug
environment
Off-the-shelf solutions Middleware, reference boards, broad OS support
Support and training Experienced application engineers, online evaluation lab, training courses
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